diff options
| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-02-21 23:26:15 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-03-05 15:17:35 +0000 |
| commit | 6e937ba7f8fb90d66cb3781f7fed32fb4239556a (patch) | |
| tree | 6cac7248f7f262fce04bb0b37fa3e5f1decf052d /target | |
| parent | 2d928adf8a9148510e1b2041145b8a873f4d26df (diff) | |
| download | qemu-6e937ba7f8fb90d66cb3781f7fed32fb4239556a.zip | |
target/arm: Restrict v8M IDAU to TCG
IDAU is specific to M-profile. KVM only supports A-profile.
Restrict this interface to TCG, as it is pointless (and
confusing) on a KVM-only build.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210221222617.2579610-2-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
| -rw-r--r-- | target/arm/cpu.c | 7 | ||||
| -rw-r--r-- | target/arm/cpu_tcg.c | 8 |
2 files changed, 8 insertions, 7 deletions
diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 058672c977..2666d4363d 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2384,12 +2384,6 @@ static const TypeInfo arm_cpu_type_info = { .class_init = arm_cpu_class_init, }; -static const TypeInfo idau_interface_type_info = { - .name = TYPE_IDAU_INTERFACE, - .parent = TYPE_INTERFACE, - .class_size = sizeof(IDAUInterfaceClass), -}; - static void arm_cpu_register_types(void) { const size_t cpu_count = ARRAY_SIZE(arm_cpus); @@ -2403,7 +2397,6 @@ static void arm_cpu_register_types(void) if (cpu_count) { size_t i; - type_register_static(&idau_interface_type_info); for (i = 0; i < cpu_count; ++i) { arm_cpu_register(&arm_cpus[i]); } diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c index c29b434c60..fb07a33693 100644 --- a/target/arm/cpu_tcg.c +++ b/target/arm/cpu_tcg.c @@ -14,6 +14,7 @@ #include "hw/core/tcg-cpu-ops.h" #endif /* CONFIG_TCG */ #include "internals.h" +#include "target/arm/idau.h" /* CPU models. These are not needed for the AArch64 linux-user build. */ #if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64) @@ -739,10 +740,17 @@ static const ARMCPUInfo arm_tcg_cpus[] = { { .name = "pxa270-c5", .initfn = pxa270c5_initfn }, }; +static const TypeInfo idau_interface_type_info = { + .name = TYPE_IDAU_INTERFACE, + .parent = TYPE_INTERFACE, + .class_size = sizeof(IDAUInterfaceClass), +}; + static void arm_tcg_cpu_register_types(void) { size_t i; + type_register_static(&idau_interface_type_info); for (i = 0; i < ARRAY_SIZE(arm_tcg_cpus); ++i) { arm_cpu_register(&arm_tcg_cpus[i]); } |