summaryrefslogtreecommitdiff
path: root/target
diff options
context:
space:
mode:
authorMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>2019-03-07 18:05:15 +0000
committerDavid Gibson <david@gibson.dropbear.id.au>2019-03-12 14:33:04 +1100
commit45141dfd2372bd07532417e27b713ef6edbca12e (patch)
treeeabf931287fa76a23736f46006ac97b73f9a81c1 /target
parente7d3b272ed49a531c1c852fe979a33ee3d45d19f (diff)
downloadqemu-45141dfd2372bd07532417e27b713ef6edbca12e.zip
target/ppc: introduce single vsrl_offset() function
Instead of having multiple copies of the offset calculation logic, move it to a single vsrl_offset() function. This commit also renames the existing get_vsr()/set_vsr() functions to get_vsrl()/set_vsrl() which better describes their purpose. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20190307180520.13868-3-mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target')
-rw-r--r--target/ppc/cpu.h7
-rw-r--r--target/ppc/translate/vsx-impl.inc.c12
2 files changed, 12 insertions, 7 deletions
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index eaf4297616..fb0f021bf4 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -2573,9 +2573,14 @@ static inline uint64_t *cpu_fpr_ptr(CPUPPCState *env, int i)
return (uint64_t *)((uintptr_t)env + fpr_offset(i));
}
+static inline int vsrl_offset(int i)
+{
+ return offsetof(CPUPPCState, vsr[i].u64[1]);
+}
+
static inline uint64_t *cpu_vsrl_ptr(CPUPPCState *env, int i)
{
- return &env->vsr[i].u64[1];
+ return (uint64_t *)((uintptr_t)env + vsrl_offset(i));
}
static inline ppc_avr_t *cpu_avr_ptr(CPUPPCState *env, int i)
diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx-impl.inc.c
index e73197e717..381ae0f2e9 100644
--- a/target/ppc/translate/vsx-impl.inc.c
+++ b/target/ppc/translate/vsx-impl.inc.c
@@ -1,13 +1,13 @@
/*** VSX extension ***/
-static inline void get_vsr(TCGv_i64 dst, int n)
+static inline void get_vsrl(TCGv_i64 dst, int n)
{
- tcg_gen_ld_i64(dst, cpu_env, offsetof(CPUPPCState, vsr[n].u64[1]));
+ tcg_gen_ld_i64(dst, cpu_env, vsrl_offset(n));
}
-static inline void set_vsr(int n, TCGv_i64 src)
+static inline void set_vsrl(int n, TCGv_i64 src)
{
- tcg_gen_st_i64(src, cpu_env, offsetof(CPUPPCState, vsr[n].u64[1]));
+ tcg_gen_st_i64(src, cpu_env, vsrl_offset(n));
}
static inline int vsr_full_offset(int n)
@@ -27,7 +27,7 @@ static inline void get_cpu_vsrh(TCGv_i64 dst, int n)
static inline void get_cpu_vsrl(TCGv_i64 dst, int n)
{
if (n < 32) {
- get_vsr(dst, n);
+ get_vsrl(dst, n);
} else {
get_avr64(dst, n - 32, false);
}
@@ -45,7 +45,7 @@ static inline void set_cpu_vsrh(int n, TCGv_i64 src)
static inline void set_cpu_vsrl(int n, TCGv_i64 src)
{
if (n < 32) {
- set_vsr(n, src);
+ set_vsrl(n, src);
} else {
set_avr64(n - 32, src, false);
}