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authorRichard Henderson <richard.henderson@linaro.org>2018-05-10 20:14:30 -0700
committerRichard Henderson <richard.henderson@linaro.org>2018-05-18 14:52:38 -0700
commit1cc5af6902cd646d91a7d590b365c87ba8909a72 (patch)
treeaf140f3b20eb5cd7761206661081bbe51639891a /target
parenta68d82b8ad73ff3eea6356b000e1c68dc7acea51 (diff)
downloadqemu-1cc5af6902cd646d91a7d590b365c87ba8909a72.zip
target/mips: Honor CPU_DUMP_FPU
Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Yongbok Kim <yongbok.kim@mips.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target')
-rw-r--r--target/mips/translate.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c
index f1c1fdd35c..e88f983ae7 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -20446,8 +20446,9 @@ void mips_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
env->CP0_Config2, env->CP0_Config3);
cpu_fprintf(f, " Config4 0x%08x Config5 0x%08x\n",
env->CP0_Config4, env->CP0_Config5);
- if (env->hflags & MIPS_HFLAG_FPU)
+ if ((flags & CPU_DUMP_FPU) && (env->hflags & MIPS_HFLAG_FPU)) {
fpu_dump_state(env, f, cpu_fprintf, flags);
+ }
}
void mips_tcg_init(void)