diff options
author | Richard Henderson <richard.henderson@linaro.org> | 2020-02-16 11:43:42 -0800 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2020-02-21 16:07:00 +0000 |
commit | 03f27724dff15633911e68a3906c30f57938ea45 (patch) | |
tree | b3e43fc63a484400c4b642b3f7e634ea71084f87 /target | |
parent | 71d181640a1a9470f074fa28600ca85587e2ca6b (diff) | |
download | qemu-03f27724dff15633911e68a3906c30f57938ea45.zip |
target/arm: Remove ttbr1_valid check from get_phys_addr_lpae
Now that aa64_va_parameters_both sets select based on the number
of ranges in the regime, the ttbr1_valid check is redundant.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200216194343.21331-4-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
-rw-r--r-- | target/arm/helper.c | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c index b09a501284..eec7b01ab3 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -10390,7 +10390,6 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, TCR *tcr = regime_tcr(env, mmu_idx); int ap, ns, xn, pxn; uint32_t el = regime_el(env, mmu_idx); - bool ttbr1_valid; uint64_t descaddrmask; bool aarch64 = arm_el_is_aa64(env, el); bool guarded = false; @@ -10405,14 +10404,11 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, param = aa64_va_parameters(env, address, mmu_idx, access_type != MMU_INST_FETCH); level = 0; - ttbr1_valid = regime_has_2_ranges(mmu_idx); addrsize = 64 - 8 * param.tbi; inputsize = 64 - param.tsz; } else { param = aa32_va_parameters(env, address, mmu_idx); level = 1; - /* There is no TTBR1 for EL2 */ - ttbr1_valid = (el != 2); addrsize = (mmu_idx == ARMMMUIdx_Stage2 ? 40 : 32); inputsize = addrsize - param.tsz; } @@ -10429,7 +10425,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, if (inputsize < addrsize) { target_ulong top_bits = sextract64(address, inputsize, addrsize - inputsize); - if (-top_bits != param.select || (param.select && !ttbr1_valid)) { + if (-top_bits != param.select) { /* The gap between the two regions is a Translation fault */ fault_type = ARMFault_Translation; goto do_fault; |