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| author | Richard Henderson <richard.henderson@linaro.org> | 2019-03-22 11:51:19 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2019-06-10 07:03:34 -0700 |
| commit | 74433bf083b0766aba81534f92de13194f23ff3e (patch) | |
| tree | 9c0c63e1d1874a47395bda07f61f160fb611c0e4 /target/tilegx | |
| parent | 79e4208506651660b866f536616a5f8f3175f909 (diff) | |
| download | qemu-74433bf083b0766aba81534f92de13194f23ff3e.zip | |
tcg: Split out target/arch/cpu-param.h
For all targets, into this new file move TARGET_LONG_BITS,
TARGET_PAGE_BITS, TARGET_PHYS_ADDR_SPACE_BITS,
TARGET_VIRT_ADDR_SPACE_BITS, and NB_MMU_MODES.
Include this new file from exec/cpu-defs.h.
This now removes the somewhat odd requirement that target/arch/cpu.h
defines TARGET_LONG_BITS before including exec/cpu-defs.h, so push the
bulk of the includes within target/arch/cpu.h to the top.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/tilegx')
| -rw-r--r-- | target/tilegx/cpu-param.h | 17 | ||||
| -rw-r--r-- | target/tilegx/cpu.h | 9 |
2 files changed, 18 insertions, 8 deletions
diff --git a/target/tilegx/cpu-param.h b/target/tilegx/cpu-param.h new file mode 100644 index 0000000000..80a341cbb7 --- /dev/null +++ b/target/tilegx/cpu-param.h @@ -0,0 +1,17 @@ +/* + * TILE-Gx cpu parameters for qemu. + * + * Copyright (c) 2015 Chen Gang + * SPDX-License-Identifier: LGPL-2.0+ + */ + +#ifndef TILEGX_CPU_PARAM_H +#define TILEGX_CPU_PARAM_H 1 + +#define TARGET_LONG_BITS 64 +#define TARGET_PAGE_BITS 16 /* TILE-Gx uses 64KB page size */ +#define TARGET_PHYS_ADDR_SPACE_BITS 42 +#define TARGET_VIRT_ADDR_SPACE_BITS 64 +#define NB_MMU_MODES 1 + +#endif diff --git a/target/tilegx/cpu.h b/target/tilegx/cpu.h index 238f8d36d7..429a6c6b43 100644 --- a/target/tilegx/cpu.h +++ b/target/tilegx/cpu.h @@ -21,13 +21,9 @@ #define TILEGX_CPU_H #include "qemu-common.h" - -#define TARGET_LONG_BITS 64 - -#define CPUArchState struct CPUTLGState - #include "exec/cpu-defs.h" +#define CPUArchState struct CPUTLGState /* TILE-Gx common register alias */ #define TILEGX_R_RE 0 /* 0 register, for function/syscall return value */ @@ -154,9 +150,6 @@ static inline TileGXCPU *tilegx_env_get_cpu(CPUTLGState *env) #define ENV_OFFSET offsetof(TileGXCPU, env) /* TILE-Gx memory attributes */ -#define TARGET_PAGE_BITS 16 /* TILE-Gx uses 64KB page size */ -#define TARGET_PHYS_ADDR_SPACE_BITS 42 -#define TARGET_VIRT_ADDR_SPACE_BITS 64 #define MMU_USER_IDX 0 /* Current memory operation is in user mode */ #include "exec/cpu-all.h" |