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author | David Hildenbrand <david@redhat.com> | 2017-06-09 15:34:26 +0200 |
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committer | Richard Henderson <rth@twiddle.net> | 2017-06-13 11:09:39 -0700 |
commit | 076d4d39b65f50ca1bba3d3c8a8f1cf977c1c3f0 (patch) | |
tree | 83b357618c62624cc4baf42094e8c50129b674b7 /target/tilegx | |
parent | becf8217deb2afc347d5172d9f30c8a8964b8b27 (diff) | |
download | qemu-076d4d39b65f50ca1bba3d3c8a8f1cf977c1c3f0.zip |
s390x/cpumodel: wire up cpu type + id for TCG
Let's properly expose the CPU type (machine-type number) via "STORE CPU
ID" and "STORE SUBSYSTEM INFORMATION".
As TCG emulates basic mode, the CPU identification number has the format
"Annnnn", whereby A is the CPU address, and n are parts of the CPU serial
number (0 for us for now).
A specification exception will be injected if the address is not aligned
to a double word. Low address protection will not be checked as
we're missing some more general support for that.
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20170609133426.11447-3-david@redhat.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target/tilegx')
0 files changed, 0 insertions, 0 deletions