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| author | Richard Henderson <rth@twiddle.net> | 2017-09-07 11:50:53 -0700 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2017-12-18 23:29:31 +0100 |
| commit | f85da3081d001909929a19e530e69cea0487f00e (patch) | |
| tree | 411c4cb169d1d71a319ffb03e9beb16021ae2dae /target/sh4/cpu.h | |
| parent | 6d56fc6cc372284a4571f09b361a9ccd99318103 (diff) | |
| download | qemu-f85da3081d001909929a19e530e69cea0487f00e.zip | |
target/sh4: Use cmpxchg for movco when parallel_cpus
As for other targets, cmpxchg isn't quite right for ll/sc,
suffering from an ABA race, but is sufficient to implement
portable atomic operations.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-Id: <20170907185057.23421-2-richard.henderson@linaro.org>
[aurel32: fix whitespace]
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target/sh4/cpu.h')
| -rw-r--r-- | target/sh4/cpu.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index 960b46870d..a2c26e0597 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -188,7 +188,9 @@ typedef struct CPUSH4State { tlb_t itlb[ITLB_SIZE]; /* instruction translation table */ tlb_t utlb[UTLB_SIZE]; /* unified translation table */ - uint32_t ldst; + /* LDST = LOCK_ADDR != -1. */ + uint32_t lock_addr; + uint32_t lock_value; /* Fields up to this point are cleared by a CPU reset */ struct {} end_reset_fields; |