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author | hiroyuki.obinata <hiroyuki.obinata@gmail.com> | 2019-10-30 09:23:18 +0900 |
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committer | Palmer Dabbelt <palmer@dabbelt.com> | 2019-11-14 09:53:28 -0800 |
commit | f480f6e8c5ca9a27c046e3a273a4693d2475bdc2 (patch) | |
tree | 6320c7570733dc304d4b040f400ea7421c6bbf3a /target/riscv | |
parent | aa464db69b40b4b695be31085e6d2f1e90956c89 (diff) | |
download | qemu-f480f6e8c5ca9a27c046e3a273a4693d2475bdc2.zip |
remove unnecessary ifdef TARGET_RISCV64
Signed-off-by: Hiroyuki Obinata <hiroyuki.obinata@gmail.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'target/riscv')
-rw-r--r-- | target/riscv/translate.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/target/riscv/translate.c b/target/riscv/translate.c index b26533d4fd..ab6a891dc3 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -64,12 +64,10 @@ static const int tcg_memop_lookup[8] = { [0] = MO_SB, [1] = MO_TESW, [2] = MO_TESL, + [3] = MO_TEQ, [4] = MO_UB, [5] = MO_TEUW, -#ifdef TARGET_RISCV64 - [3] = MO_TEQ, [6] = MO_TEUL, -#endif }; #endif |