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| author | Richard Henderson <richard.henderson@linaro.org> | 2018-05-10 13:52:48 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2018-05-17 15:27:15 -0700 |
| commit | cab3211261b3dad5de3b15fadcca483af5e2b113 (patch) | |
| tree | 859cfe2388b916c57bd69b3c7f2b1a28b41e4aaa /target/riscv | |
| parent | 4accd4a89f776b0d2a34d1edf74c785549c7f3b9 (diff) | |
| download | qemu-cab3211261b3dad5de3b15fadcca483af5e2b113.zip | |
target/riscv: Remove floatX_maybe_silence_nan from conversions
This is now handled properly by the generic softfloat code.
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Michael Clark <mjc@sifive.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/riscv')
| -rw-r--r-- | target/riscv/fpu_helper.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/target/riscv/fpu_helper.c b/target/riscv/fpu_helper.c index abbadead5c..fdb87d8d82 100644 --- a/target/riscv/fpu_helper.c +++ b/target/riscv/fpu_helper.c @@ -279,14 +279,12 @@ uint64_t helper_fmax_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2) uint64_t helper_fcvt_s_d(CPURISCVState *env, uint64_t rs1) { - rs1 = float64_to_float32(rs1, &env->fp_status); - return float32_maybe_silence_nan(rs1, &env->fp_status); + return float64_to_float32(rs1, &env->fp_status); } uint64_t helper_fcvt_d_s(CPURISCVState *env, uint64_t rs1) { - rs1 = float32_to_float64(rs1, &env->fp_status); - return float64_maybe_silence_nan(rs1, &env->fp_status); + return float32_to_float64(rs1, &env->fp_status); } uint64_t helper_fsqrt_d(CPURISCVState *env, uint64_t frs1) |