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| author | Atish Patra <atish.patra@wdc.com> | 2019-08-23 08:21:19 -0700 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@sifive.com> | 2019-09-17 08:42:50 -0700 |
| commit | a9f37afab111ddbe394574bed5f69683439d46e6 (patch) | |
| tree | a752e91ce7ac548c8531440b6f005a0c2f6170d9 /target/riscv/csr.c | |
| parent | d372e7486f48f00a7a1e2db56d2795976845f5fc (diff) | |
| download | qemu-a9f37afab111ddbe394574bed5f69683439d46e6.zip | |
target/riscv: Use both register name and ABI name
Use both the generic register name and ABI name for the general purpose
registers and floating point registers.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'target/riscv/csr.c')
0 files changed, 0 insertions, 0 deletions