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| author | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2019-03-07 18:05:15 +0000 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2019-03-12 14:33:04 +1100 |
| commit | 45141dfd2372bd07532417e27b713ef6edbca12e (patch) | |
| tree | eabf931287fa76a23736f46006ac97b73f9a81c1 /target/ppc/translate | |
| parent | e7d3b272ed49a531c1c852fe979a33ee3d45d19f (diff) | |
| download | qemu-45141dfd2372bd07532417e27b713ef6edbca12e.zip | |
target/ppc: introduce single vsrl_offset() function
Instead of having multiple copies of the offset calculation logic, move it to a
single vsrl_offset() function.
This commit also renames the existing get_vsr()/set_vsr() functions to
get_vsrl()/set_vsrl() which better describes their purpose.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20190307180520.13868-3-mark.cave-ayland@ilande.co.uk>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/translate')
| -rw-r--r-- | target/ppc/translate/vsx-impl.inc.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx-impl.inc.c index e73197e717..381ae0f2e9 100644 --- a/target/ppc/translate/vsx-impl.inc.c +++ b/target/ppc/translate/vsx-impl.inc.c @@ -1,13 +1,13 @@ /*** VSX extension ***/ -static inline void get_vsr(TCGv_i64 dst, int n) +static inline void get_vsrl(TCGv_i64 dst, int n) { - tcg_gen_ld_i64(dst, cpu_env, offsetof(CPUPPCState, vsr[n].u64[1])); + tcg_gen_ld_i64(dst, cpu_env, vsrl_offset(n)); } -static inline void set_vsr(int n, TCGv_i64 src) +static inline void set_vsrl(int n, TCGv_i64 src) { - tcg_gen_st_i64(src, cpu_env, offsetof(CPUPPCState, vsr[n].u64[1])); + tcg_gen_st_i64(src, cpu_env, vsrl_offset(n)); } static inline int vsr_full_offset(int n) @@ -27,7 +27,7 @@ static inline void get_cpu_vsrh(TCGv_i64 dst, int n) static inline void get_cpu_vsrl(TCGv_i64 dst, int n) { if (n < 32) { - get_vsr(dst, n); + get_vsrl(dst, n); } else { get_avr64(dst, n - 32, false); } @@ -45,7 +45,7 @@ static inline void set_cpu_vsrh(int n, TCGv_i64 src) static inline void set_cpu_vsrl(int n, TCGv_i64 src) { if (n < 32) { - set_vsr(n, src); + set_vsrl(n, src); } else { set_avr64(n - 32, src, false); } |