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| author | Richard Henderson <richard.henderson@linaro.org> | 2018-05-22 16:51:19 -0700 |
|---|---|---|
| committer | Stafford Horne <shorne@gmail.com> | 2018-07-03 00:05:28 +0900 |
| commit | 23d45ebdb198378ae580c98ac898aa4b615059fd (patch) | |
| tree | 4463196c531f9677f1436f0c80132b1086642a19 /target/openrisc/interrupt.c | |
| parent | 455d45d22cc3b2c29c7840f2478647a0a3d9d8b4 (diff) | |
| download | qemu-23d45ebdb198378ae580c98ac898aa4b615059fd.zip | |
target/openrisc: Remove indirect function calls for mmu
There is no reason to use an indirect branch instead
of simply testing the SR bits that control mmu state.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Stafford Horne <shorne@gmail.com>
Diffstat (limited to 'target/openrisc/interrupt.c')
| -rw-r--r-- | target/openrisc/interrupt.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/target/openrisc/interrupt.c b/target/openrisc/interrupt.c index 2d0b55afa9..23abcf29ed 100644 --- a/target/openrisc/interrupt.c +++ b/target/openrisc/interrupt.c @@ -63,8 +63,6 @@ void openrisc_cpu_do_interrupt(CPUState *cs) env->sr &= ~SR_TEE; env->pmr &= ~PMR_DME; env->pmr &= ~PMR_SME; - env->tlb.cpu_openrisc_map_address_data = &cpu_openrisc_get_phys_nommu; - env->tlb.cpu_openrisc_map_address_code = &cpu_openrisc_get_phys_nommu; env->lock_addr = -1; if (exception > 0 && exception < EXCP_NR) { |