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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2017-09-20 16:49:31 -0300 |
|---|---|---|
| committer | Yongbok Kim <yongbok.kim@imgtec.com> | 2017-09-21 13:24:34 +0100 |
| commit | 27e38392ca07f97edfb2257b6a1394a04d84e8d5 (patch) | |
| tree | ffa3ed7dfb5b2a9cfd843f5e4eb32eccf135a800 /target/mips | |
| parent | 26aa3d9aecbb6fe9bce808a1d127191bdf3cc3d2 (diff) | |
| download | qemu-27e38392ca07f97edfb2257b6a1394a04d84e8d5.zip | |
mips: split cpu_mips_realize_env() out of cpu_mips_init()
so it can be used in mips_cpu_realizefn() in the next commit
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Igor Mammedov <imammedo@redhat.com>
Tested-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Diffstat (limited to 'target/mips')
| -rw-r--r-- | target/mips/internal.h | 1 | ||||
| -rw-r--r-- | target/mips/translate.c | 19 |
2 files changed, 13 insertions, 7 deletions
diff --git a/target/mips/internal.h b/target/mips/internal.h index 91c2df4537..cf4c9db427 100644 --- a/target/mips/internal.h +++ b/target/mips/internal.h @@ -132,6 +132,7 @@ void mips_tcg_init(void); /* TODO QOM'ify CPU reset and remove */ void cpu_state_reset(CPUMIPSState *s); +void cpu_mips_realize_env(CPUMIPSState *env); /* cp0_timer.c */ uint32_t cpu_mips_get_random(CPUMIPSState *env); diff --git a/target/mips/translate.c b/target/mips/translate.c index f0febaf1b2..5fc7979ac5 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -20512,6 +20512,17 @@ void mips_tcg_init(void) #include "translate_init.c" +void cpu_mips_realize_env(CPUMIPSState *env) +{ + env->exception_base = (int32_t)0xBFC00000; + +#ifndef CONFIG_USER_ONLY + mmu_init(env, env->cpu_model); +#endif + fpu_init(env, env->cpu_model); + mvp_init(env, env->cpu_model); +} + MIPSCPU *cpu_mips_init(const char *cpu_model) { MIPSCPU *cpu; @@ -20524,13 +20535,7 @@ MIPSCPU *cpu_mips_init(const char *cpu_model) cpu = MIPS_CPU(object_new(TYPE_MIPS_CPU)); env = &cpu->env; env->cpu_model = def; - env->exception_base = (int32_t)0xBFC00000; - -#ifndef CONFIG_USER_ONLY - mmu_init(env, def); -#endif - fpu_init(env, def); - mvp_init(env, def); + cpu_mips_realize_env(env); object_property_set_bool(OBJECT(cpu), true, "realized", NULL); |