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authorJames Hogan <james.hogan@imgtec.com>2017-07-18 12:55:54 +0100
committerYongbok Kim <yongbok.kim@imgtec.com>2017-07-20 22:42:26 +0100
commitb0fc6003224543d2bdb172eca752656a6223e4a1 (patch)
tree174e0757fcf32dd89fe80f47f6e29c38b8d84dd8 /target/mips/op_helper.c
parent9fbf4a58c90183b30bb2c8ad971ccce7e6716a16 (diff)
downloadqemu-b0fc6003224543d2bdb172eca752656a6223e4a1.zip
target/mips: Abstract mmu_idx from hflags
The MIPS mmu_idx is sometimes calculated from hflags without an env pointer available as cpu_mmu_index() requires. Create a common hflags_mmu_index() for the purpose of this calculation which can operate on any hflags, not just with an env pointer, and update cpu_mmu_index() itself and gen_intermediate_code() to use it. Also update debug_post_eret() and helper_mtc0_status() to log the MMU mode with the status change (SM, UM, or nothing for kernel mode) based on cpu_mmu_index() rather than directly testing hflags. This will also allow the logic to be more easily updated when a new MMU mode is added. Signed-off-by: James Hogan <james.hogan@imgtec.com> Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Diffstat (limited to 'target/mips/op_helper.c')
-rw-r--r--target/mips/op_helper.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c
index 3b560d96b4..da1817e94a 100644
--- a/target/mips/op_helper.c
+++ b/target/mips/op_helper.c
@@ -1450,7 +1450,7 @@ void helper_mtc0_status(CPUMIPSState *env, target_ulong arg1)
old, old & env->CP0_Cause & CP0Ca_IP_mask,
val, val & env->CP0_Cause & CP0Ca_IP_mask,
env->CP0_Cause);
- switch (env->hflags & MIPS_HFLAG_KSU) {
+ switch (cpu_mmu_index(env, false)) {
case MIPS_HFLAG_UM: qemu_log(", UM\n"); break;
case MIPS_HFLAG_SM: qemu_log(", SM\n"); break;
case MIPS_HFLAG_KM: qemu_log("\n"); break;
@@ -2244,7 +2244,7 @@ static void debug_post_eret(CPUMIPSState *env)
qemu_log(" ErrorEPC " TARGET_FMT_lx, env->CP0_ErrorEPC);
if (env->hflags & MIPS_HFLAG_DM)
qemu_log(" DEPC " TARGET_FMT_lx, env->CP0_DEPC);
- switch (env->hflags & MIPS_HFLAG_KSU) {
+ switch (cpu_mmu_index(env, false)) {
case MIPS_HFLAG_UM: qemu_log(", UM\n"); break;
case MIPS_HFLAG_SM: qemu_log(", SM\n"); break;
case MIPS_HFLAG_KM: qemu_log("\n"); break;