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authorRichard Henderson <richard.henderson@linaro.org>2018-05-10 13:50:41 -0700
committerRichard Henderson <richard.henderson@linaro.org>2018-05-17 15:27:15 -0700
commit4accd4a89f776b0d2a34d1edf74c785549c7f3b9 (patch)
tree6f7c395fe22ece35dd18c956d4e0740315ab6c3c /target/mips/op_helper.c
parent1c0c951f717e66b4be45611c0d6661a2dff4241c (diff)
downloadqemu-4accd4a89f776b0d2a34d1edf74c785549c7f3b9.zip
target/mips: Remove floatX_maybe_silence_nan from conversions
This is now handled properly by the generic softfloat code. Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Yongbok Kim <yongbok.kim@mips.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/mips/op_helper.c')
-rw-r--r--target/mips/op_helper.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c
index 798cdad030..9025f42366 100644
--- a/target/mips/op_helper.c
+++ b/target/mips/op_helper.c
@@ -2700,7 +2700,6 @@ uint64_t helper_float_cvtd_s(CPUMIPSState *env, uint32_t fst0)
uint64_t fdt2;
fdt2 = float32_to_float64(fst0, &env->active_fpu.fp_status);
- fdt2 = float64_maybe_silence_nan(fdt2, &env->active_fpu.fp_status);
update_fcr31(env, GETPC());
return fdt2;
}
@@ -2790,7 +2789,6 @@ uint32_t helper_float_cvts_d(CPUMIPSState *env, uint64_t fdt0)
uint32_t fst2;
fst2 = float64_to_float32(fdt0, &env->active_fpu.fp_status);
- fst2 = float32_maybe_silence_nan(fst2, &env->active_fpu.fp_status);
update_fcr31(env, GETPC());
return fst2;
}