summaryrefslogtreecommitdiff
path: root/target/mips/mips-defs.h
diff options
context:
space:
mode:
authorJiaxun Yang <jiaxun.yang@flygoat.com>2020-06-14 16:00:46 +0800
committerAleksandar Markovic <aleksandar.qemu.devel@gmail.com>2020-06-15 20:31:25 +0200
commit8e2d5831e4b53720d4846aca9eabe3652e7192af (patch)
tree35d0b465dad21d5a258ec018964863bfd85e457b /target/mips/mips-defs.h
parent7d3660e79830a069f1848bb4fa1cdf8f666424fb (diff)
downloadqemu-8e2d5831e4b53720d4846aca9eabe3652e7192af.zip
target/mips: Legalize Loongson insn flags
To match the actual status of Loongson insn, we split flags for LMMI and LEXT from INSN_LOONGSON2F. As Loongson-2F only implemented interger part of LEXT, we'll not enable LEXT for the processor, but instead we're still using INSN_LOONGSON2F as switch flag of these instructions. All multimedia instructions have been moved to LMMI flag. Loongson-2F and Loongson-3A are sharing these instructions. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200614080049.31134-2-jiaxun.yang@flygoat.com>
Diffstat (limited to 'target/mips/mips-defs.h')
-rw-r--r--target/mips/mips-defs.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h
index 0c129106c8..f1b833f947 100644
--- a/target/mips/mips-defs.h
+++ b/target/mips/mips-defs.h
@@ -70,7 +70,7 @@
#define CPU_VR54XX (CPU_MIPS4 | INSN_VR54XX)
#define CPU_R5900 (CPU_MIPS3 | INSN_R5900)
#define CPU_LOONGSON2E (CPU_MIPS3 | INSN_LOONGSON2E)
-#define CPU_LOONGSON2F (CPU_MIPS3 | INSN_LOONGSON2F)
+#define CPU_LOONGSON2F (CPU_MIPS3 | INSN_LOONGSON2F | ASE_LMMI)
#define CPU_MIPS5 (CPU_MIPS4 | ISA_MIPS5)
@@ -97,7 +97,7 @@
/* Wave Computing: "nanoMIPS" */
#define CPU_NANOMIPS32 (CPU_MIPS32R6 | ISA_NANOMIPS32)
-#define CPU_LOONGSON3A (CPU_MIPS64R2 | INSN_LOONGSON3A)
+#define CPU_LOONGSON3A (CPU_MIPS64R2 | INSN_LOONGSON3A | ASE_LMMI | ASE_LEXT)
/*
* Strictly follow the architecture standard: