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authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2021-01-28 02:08:39 +0100
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>2021-02-21 19:42:34 +0100
commit48b28c6a8e9ff64498efa244b1b3ee1bbcd01202 (patch)
treef554141d4af7e949795b7c08e9734a62fe80f463 /target/mips/internal.h
parent1190c53e822a287f2767ebddf792d290dd760db0 (diff)
downloadqemu-48b28c6a8e9ff64498efa244b1b3ee1bbcd01202.zip
target/mips: Let cpu_mips_translate_address() take MMUAccessType arg
The single caller, do_translate_address(), passes MMUAccessType to cpu_mips_translate_address(). Let the prototype use it as argument, as it is stricter than an integer. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Message-Id: <20210128144125.3696119-10-f4bug@amsat.org>
Diffstat (limited to 'target/mips/internal.h')
-rw-r--r--target/mips/internal.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/mips/internal.h b/target/mips/internal.h
index d09afded5e..34915c275c 100644
--- a/target/mips/internal.h
+++ b/target/mips/internal.h
@@ -146,7 +146,7 @@ void mips_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
int mmu_idx, MemTxAttrs attrs,
MemTxResult response, uintptr_t retaddr);
hwaddr cpu_mips_translate_address(CPUMIPSState *env, target_ulong address,
- int rw);
+ MMUAccessType access_type);
#endif
#define cpu_signal_handler cpu_mips_signal_handler