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authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>2018-04-16 19:37:16 +0200
committerEdgar E. Iglesias <edgar.iglesias@xilinx.com>2018-05-29 09:35:14 +0200
commit3924a9aa02fa00a256ddcfe2d6a08bc410ddcaaf (patch)
tree5a197ba6ad44c14012742a136e89af2c62efb488 /target/microblaze
parentd2f004c3cdcb786303057683252112c3ff7b337e (diff)
downloadqemu-3924a9aa02fa00a256ddcfe2d6a08bc410ddcaaf.zip
target-microblaze: mmu: Add a configurable output address mask
Add a configurable output address mask, used to mimic the configurable physical address bit width. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target/microblaze')
-rw-r--r--target/microblaze/cpu.c1
-rw-r--r--target/microblaze/mmu.c1
-rw-r--r--target/microblaze/mmu.h1
3 files changed, 3 insertions, 0 deletions
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index 6ee15ac800..71fc8d09fe 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -128,6 +128,7 @@ static void mb_cpu_reset(CPUState *s)
env->mmu.c_mmu = 3;
env->mmu.c_mmu_tlb_access = 3;
env->mmu.c_mmu_zones = 16;
+ env->mmu.c_addr_mask = MAKE_64BIT_MASK(0, cpu->cfg.addr_size);
#endif
}
diff --git a/target/microblaze/mmu.c b/target/microblaze/mmu.c
index a379968618..166c79908c 100644
--- a/target/microblaze/mmu.c
+++ b/target/microblaze/mmu.c
@@ -164,6 +164,7 @@ unsigned int mmu_translate(struct microblaze_mmu *mmu,
tlb_rpn = d & TLB_RPN_MASK;
lu->vaddr = tlb_tag;
+ lu->paddr = tlb_rpn & mmu->c_addr_mask;
lu->paddr = tlb_rpn;
lu->size = tlb_size;
lu->err = ERR_HIT;
diff --git a/target/microblaze/mmu.h b/target/microblaze/mmu.h
index 1714caf82e..9fbdf38f36 100644
--- a/target/microblaze/mmu.h
+++ b/target/microblaze/mmu.h
@@ -72,6 +72,7 @@ struct microblaze_mmu
int c_mmu;
int c_mmu_tlb_access;
int c_mmu_zones;
+ uint64_t c_addr_mask; /* Mask to apply to physical addresses. */
};
struct microblaze_mmu_lookup