diff options
| author | Yang Zhong <yang.zhong@intel.com> | 2017-07-03 18:12:19 +0800 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2017-07-05 09:12:44 +0200 |
| commit | 1d8ad165b688759bbf00e40431ee9fde8817d190 (patch) | |
| tree | 4f43b9fb62be94a50e57a94717d3ba9dd27a46af /target/i386/fpu_helper.c | |
| parent | db573d2cf7ae6b5a4fc324be6f55e078fc218464 (diff) | |
| download | qemu-1d8ad165b688759bbf00e40431ee9fde8817d190.zip | |
target/i386: split cpu_set_mxcsr() and make cpu_set_fpuc() inline
Split the cpu_set_mxcsr() and make cpu_set_fpuc() inline with specific
tcg code.
Signed-off-by: Yang Zhong <yang.zhong@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target/i386/fpu_helper.c')
| -rw-r--r-- | target/i386/fpu_helper.c | 11 |
1 files changed, 2 insertions, 9 deletions
diff --git a/target/i386/fpu_helper.c b/target/i386/fpu_helper.c index 34fb5fca66..9014b6f88a 100644 --- a/target/i386/fpu_helper.c +++ b/target/i386/fpu_helper.c @@ -1550,12 +1550,11 @@ void helper_xsetbv(CPUX86State *env, uint32_t ecx, uint64_t mask) #define SSE_RC_CHOP 0x6000 #define SSE_FZ 0x8000 -void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr) +void update_mxcsr_status(CPUX86State *env) { + uint32_t mxcsr = env->mxcsr; int rnd_type; - env->mxcsr = mxcsr; - /* set rounding mode */ switch (mxcsr & SSE_RC_MASK) { default: @@ -1581,12 +1580,6 @@ void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr) set_flush_to_zero((mxcsr & SSE_FZ) ? 1 : 0, &env->fp_status); } -void cpu_set_fpuc(CPUX86State *env, uint16_t val) -{ - env->fpuc = val; - update_fp_status(env); -} - void helper_ldmxcsr(CPUX86State *env, uint32_t val) { cpu_set_mxcsr(env, val); |