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author | Taylor Simpson <tsimpson@quicinc.com> | 2021-04-08 20:07:48 -0500 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2021-05-01 08:31:43 -0700 |
commit | 0a65d286936a5fd0ac459a0a047e527ce55731e3 (patch) | |
tree | f8fe97593a78cc5a2dd3e5998b415832d8a971b4 /target/hexagon/gen_tcg.h | |
parent | da74cd2dced1ca36ffa864e70cf5ee8d3a8c1fab (diff) | |
download | qemu-0a65d286936a5fd0ac459a0a047e527ce55731e3.zip |
Hexagon (target/hexagon) add A6_vminub_RdP
Rdd32,Pe4 = vminub(Rtt32, Rss32)
Vector min of bytes
Test cases in tests/tcg/hexagon/multi_result.c
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <1617930474-31979-21-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/hexagon/gen_tcg.h')
-rw-r--r-- | target/hexagon/gen_tcg.h | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/target/hexagon/gen_tcg.h b/target/hexagon/gen_tcg.h index 93310c5edc..aea0c55564 100644 --- a/target/hexagon/gen_tcg.h +++ b/target/hexagon/gen_tcg.h @@ -237,6 +237,33 @@ tcg_temp_free_i64(tmp); \ } while (0) +/* + * Compare each of the 8 unsigned bytes + * The minimum is placed in each byte of the destination. + * Each bit of the predicate is set true if the bit from the first operand + * is greater than the bit from the second operand. + * r5:4,p1 = vminub(r1:0, r3:2) + */ +#define fGEN_TCG_A6_vminub_RdP(SHORTCODE) \ + do { \ + TCGv left = tcg_temp_new(); \ + TCGv right = tcg_temp_new(); \ + TCGv tmp = tcg_temp_new(); \ + tcg_gen_movi_tl(PeV, 0); \ + tcg_gen_movi_i64(RddV, 0); \ + for (int i = 0; i < 8; i++) { \ + gen_get_byte_i64(left, i, RttV, false); \ + gen_get_byte_i64(right, i, RssV, false); \ + tcg_gen_setcond_tl(TCG_COND_GT, tmp, left, right); \ + tcg_gen_deposit_tl(PeV, PeV, tmp, i, 1); \ + tcg_gen_umin_tl(tmp, left, right); \ + gen_set_byte_i64(i, RddV, tmp); \ + } \ + tcg_temp_free(left); \ + tcg_temp_free(right); \ + tcg_temp_free(tmp); \ + } while (0) + /* Floating point */ #define fGEN_TCG_F2_conv_sf2df(SHORTCODE) \ gen_helper_conv_sf2df(RddV, cpu_env, RsV) |