diff options
author | Richard Henderson <richard.henderson@linaro.org> | 2019-08-15 09:46:44 +0100 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2019-08-16 14:02:50 +0100 |
commit | 06bcbda3f64d464b6ecac789bce4bd69f199cd68 (patch) | |
tree | 0f3c2c7e8d4178c0a3e6fa9bc6c128919f2a2641 /target/arm | |
parent | aee828e7541a5895669ade3a4b6978382b6b094a (diff) | |
download | qemu-06bcbda3f64d464b6ecac789bce4bd69f199cd68.zip |
target/arm: Remove offset argument to gen_exception_bkpt_insn
Unlike the other more generic gen_exception{,_internal}_insn
interfaces, breakpoints always refer to the current instruction.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190807045335.1361-10-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm')
-rw-r--r-- | target/arm/translate-a64.c | 7 | ||||
-rw-r--r-- | target/arm/translate.c | 8 |
2 files changed, 7 insertions, 8 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 2f8eea02e3..55324333da 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -268,12 +268,11 @@ static void gen_exception_insn(DisasContext *s, uint64_t pc, int excp, s->base.is_jmp = DISAS_NORETURN; } -static void gen_exception_bkpt_insn(DisasContext *s, int offset, - uint32_t syndrome) +static void gen_exception_bkpt_insn(DisasContext *s, uint32_t syndrome) { TCGv_i32 tcg_syn; - gen_a64_set_pc_im(s->base.pc_next - offset); + gen_a64_set_pc_im(s->pc_curr); tcg_syn = tcg_const_i32(syndrome); gen_helper_exception_bkpt_insn(cpu_env, tcg_syn); tcg_temp_free_i32(tcg_syn); @@ -1900,7 +1899,7 @@ static void disas_exc(DisasContext *s, uint32_t insn) break; } /* BRK */ - gen_exception_bkpt_insn(s, 4, syn_aa64_bkpt(imm16)); + gen_exception_bkpt_insn(s, syn_aa64_bkpt(imm16)); break; case 2: if (op2_ll != 0) { diff --git a/target/arm/translate.c b/target/arm/translate.c index c26d3376b3..8bae0c3993 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -1258,12 +1258,12 @@ static void gen_exception_insn(DisasContext *s, uint32_t pc, int excp, s->base.is_jmp = DISAS_NORETURN; } -static void gen_exception_bkpt_insn(DisasContext *s, int offset, uint32_t syn) +static void gen_exception_bkpt_insn(DisasContext *s, uint32_t syn) { TCGv_i32 tcg_syn; gen_set_condexec(s); - gen_set_pc_im(s, s->base.pc_next - offset); + gen_set_pc_im(s, s->pc_curr); tcg_syn = tcg_const_i32(syn); gen_helper_exception_bkpt_insn(cpu_env, tcg_syn); tcg_temp_free_i32(tcg_syn); @@ -8140,7 +8140,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn) case 1: /* bkpt */ ARCH(5); - gen_exception_bkpt_insn(s, 4, syn_aa32_bkpt(imm16, false)); + gen_exception_bkpt_insn(s, syn_aa32_bkpt(imm16, false)); break; case 2: /* Hypervisor call (v7) */ @@ -11566,7 +11566,7 @@ static void disas_thumb_insn(DisasContext *s, uint32_t insn) { int imm8 = extract32(insn, 0, 8); ARCH(5); - gen_exception_bkpt_insn(s, 2, syn_aa32_bkpt(imm8, true)); + gen_exception_bkpt_insn(s, syn_aa32_bkpt(imm8, true)); break; } |