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author | Richard Henderson <richard.henderson@linaro.org> | 2019-02-15 09:56:40 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2019-02-15 09:56:40 +0000 |
commit | 9ecd3c5c1651fa7f9adbedff4806a2da0b50490c (patch) | |
tree | 573bae3c020942ce4db9d673eae788d3e8d0ce2e /target/arm/translate.c | |
parent | 6f2782218230bbb33fa22f9a2f73f8a570046007 (diff) | |
download | qemu-9ecd3c5c1651fa7f9adbedff4806a2da0b50490c.zip |
target/arm: Use tcg integer min/max primitives for neon
The 32-bit PMIN/PMAX has been decomposed to scalars,
and so can be trivially expanded inline.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190209033847.9014-5-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate.c')
-rw-r--r-- | target/arm/translate.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c index df1cd3fa3e..f0101d2788 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -4760,10 +4760,10 @@ static inline void gen_neon_rsb(int size, TCGv_i32 t0, TCGv_i32 t1) } /* 32-bit pairwise ops end up the same as the elementwise versions. */ -#define gen_helper_neon_pmax_s32 gen_helper_neon_max_s32 -#define gen_helper_neon_pmax_u32 gen_helper_neon_max_u32 -#define gen_helper_neon_pmin_s32 gen_helper_neon_min_s32 -#define gen_helper_neon_pmin_u32 gen_helper_neon_min_u32 +#define gen_helper_neon_pmax_s32 tcg_gen_smax_i32 +#define gen_helper_neon_pmax_u32 tcg_gen_umax_i32 +#define gen_helper_neon_pmin_s32 tcg_gen_smin_i32 +#define gen_helper_neon_pmin_u32 tcg_gen_umin_i32 #define GEN_NEON_INTEGER_OP_ENV(name) do { \ switch ((size << 1) | u) { \ |