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authorPeter Maydell <peter.maydell@linaro.org>2017-03-20 12:41:44 +0000
committerPeter Maydell <peter.maydell@linaro.org>2017-03-20 12:41:44 +0000
commit43ac65742319ef5ac4461daf43316b189cd21e89 (patch)
tree002d91e680d68c84c9583073482b75adb38b02fb /target/arm/translate.c
parent001b3cab51ebfcb13e8dd03ea25bfa3bd0c517a3 (diff)
downloadqemu-43ac65742319ef5ac4461daf43316b189cd21e89.zip
arm: Don't decode MRS(banked) or MSR(banked) for M profile
M profile doesn't have the MSR(banked) and MRS(banked) instructions and uses the encodings for different kinds of M-profile MRS/MSR. Guard the relevant bits of the decode logic to make sure we don't accidentally fall into them by accident on M-profile. (The bit being checked for this (bit 5) is part of the SYSm field on M-profile, but since no currently allocated system registers have encodings with bit 5 of SYSm set, this hasn't been a problem in practice.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1487616072-9226-3-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/translate.c')
-rw-r--r--target/arm/translate.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 216852b673..a5f5a28ba4 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -10500,7 +10500,8 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
gen_exception_return(s, tmp);
break;
case 6: /* MRS */
- if (extract32(insn, 5, 1)) {
+ if (extract32(insn, 5, 1) &&
+ !arm_dc_feature(s, ARM_FEATURE_M)) {
/* MRS (banked) */
int sysm = extract32(insn, 16, 4) |
(extract32(insn, 4, 1) << 4);
@@ -10521,7 +10522,8 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
store_reg(s, rd, tmp);
break;
case 7: /* MRS */
- if (extract32(insn, 5, 1)) {
+ if (extract32(insn, 5, 1) &&
+ !arm_dc_feature(s, ARM_FEATURE_M)) {
/* MRS (banked) */
int sysm = extract32(insn, 16, 4) |
(extract32(insn, 4, 1) << 4);