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| author | Richard Henderson <richard.henderson@linaro.org> | 2019-05-23 14:47:43 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-05-23 14:47:43 +0100 |
| commit | 87eb65a3c45c788a309986d48170a54a0d1c0705 (patch) | |
| tree | a72c57aa155c6b1f4cc214f79ea3527b4450ad7e /target/arm/translate-a64.c | |
| parent | 80ac954c369e7e61bd1ed00cef07b63e11f9c734 (diff) | |
| download | qemu-87eb65a3c45c788a309986d48170a54a0d1c0705.zip | |
target/arm: Simplify BFXIL expansion
The mask implied by the extract is redundant with the one
implied by the deposit. Also, fix spelling of BFXIL.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190514011129.11330-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate-a64.c')
| -rw-r--r-- | target/arm/translate-a64.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 2b135b938c..42999c5801 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -4043,8 +4043,8 @@ static void disas_bitfield(DisasContext *s, uint32_t insn) tcg_gen_extract_i64(tcg_rd, tcg_tmp, ri, len); return; } - /* opc == 1, BXFIL fall through to deposit */ - tcg_gen_extract_i64(tcg_tmp, tcg_tmp, ri, len); + /* opc == 1, BFXIL fall through to deposit */ + tcg_gen_shri_i64(tcg_tmp, tcg_tmp, ri); pos = 0; } else { /* Handle the ri > si case with a deposit @@ -4062,7 +4062,7 @@ static void disas_bitfield(DisasContext *s, uint32_t insn) len = ri; } - if (opc == 1) { /* BFM, BXFIL */ + if (opc == 1) { /* BFM, BFXIL */ tcg_gen_deposit_i64(tcg_rd, tcg_rd, tcg_tmp, pos, len); } else { /* SBFM or UBFM: We start with zero, and we haven't modified |