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authorPeter Maydell <peter.maydell@linaro.org>2017-03-20 12:41:44 +0000
committerPeter Maydell <peter.maydell@linaro.org>2017-03-20 12:41:44 +0000
commit3d54026fb06d1aea7ebb4e9825970b06bebcacac (patch)
tree453529a1eaca7dd91ae1fd6a2936c0eb16c5c33d /target/arm/helper.c
parent43ac65742319ef5ac4461daf43316b189cd21e89 (diff)
downloadqemu-3d54026fb06d1aea7ebb4e9825970b06bebcacac.zip
arm: Enforce should-be-1 bits in MRS decoding
The MRS instruction requires that bits [19..16] are all 1s, and for A/R profile also that bits [7..0] are all 0s. At this point in the decode tree we have checked all of the rest of the instruction but were allowing these to be any value. If these bits are not set then the result is architecturally UNPREDICTABLE, but choosing to UNDEF is more helpful to the user and avoids unexpected odd behaviour if the encodings are used for some purpose in future architecture versions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1487616072-9226-4-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/helper.c')
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