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authorPeter Maydell <peter.maydell@linaro.org>2017-10-27 08:04:51 +0100
committerPeter Maydell <peter.maydell@linaro.org>2017-10-27 08:04:51 +0100
commit6e6430a821a150bea3fb10cb42d4f90f99f0f43d (patch)
tree7b984e2c439eb4e317a3a09e4d1ea696c80dbd76 /target/arm/cpu.c
parent74d7fc7f6385158b8a5c524c61baaef1b66f3dac (diff)
parente219c499e9f5d4fa0e25dc07682f75531ee84d86 (diff)
downloadqemu-6e6430a821a150bea3fb10cb42d4f90f99f0f43d.zip
Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into staging
Capstone disassembler # gpg: Signature made Thu 26 Oct 2017 10:57:27 BST # gpg: using RSA key 0x64DF38E8AF7E215F # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-dis-20171026: disas: Add capstone as submodule disas: Remove monitor_disas_is_physical ppc: Support Capstone in disas_set_info arm: Support Capstone in disas_set_info i386: Support Capstone in disas_set_info disas: Support the Capstone disassembler library disas: Remove unused flags arguments target/arm: Don't set INSN_ARM_BE32 for CONFIG_USER_ONLY target/arm: Move BE32 disassembler fixup target/ppc: Convert to disas_set_info hook target/i386: Convert to disas_set_info hook Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # target/i386/cpu.c # target/ppc/translate_init.c
Diffstat (limited to 'target/arm/cpu.c')
-rw-r--r--target/arm/cpu.c49
1 files changed, 25 insertions, 24 deletions
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index a7f03eabe8..47c8b2a85c 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -33,6 +33,7 @@
#include "sysemu/sysemu.h"
#include "sysemu/hw_accel.h"
#include "kvm_arm.h"
+#include "disas/capstone.h"
static void arm_cpu_set_pc(CPUState *cs, vaddr value)
{
@@ -473,25 +474,11 @@ print_insn_thumb1(bfd_vma pc, disassemble_info *info)
return print_insn_arm(pc | 1, info);
}
-static int arm_read_memory_func(bfd_vma memaddr, bfd_byte *b,
- int length, struct disassemble_info *info)
-{
- assert(info->read_memory_inner_func);
- assert((info->flags & INSN_ARM_BE32) == 0 || length == 2 || length == 4);
-
- if ((info->flags & INSN_ARM_BE32) != 0 && length == 2) {
- assert(info->endian == BFD_ENDIAN_LITTLE);
- return info->read_memory_inner_func(memaddr ^ 2, (bfd_byte *)b, 2,
- info);
- } else {
- return info->read_memory_inner_func(memaddr, b, length, info);
- }
-}
-
static void arm_disas_set_info(CPUState *cpu, disassemble_info *info)
{
ARMCPU *ac = ARM_CPU(cpu);
CPUARMState *env = &ac->env;
+ bool sctlr_b;
if (is_a64(env)) {
/* We might not be compiled with the A64 disassembler
@@ -501,26 +488,40 @@ static void arm_disas_set_info(CPUState *cpu, disassemble_info *info)
#if defined(CONFIG_ARM_A64_DIS)
info->print_insn = print_insn_arm_a64;
#endif
- } else if (env->thumb) {
- info->print_insn = print_insn_thumb1;
+ info->cap_arch = CS_ARCH_ARM64;
} else {
- info->print_insn = print_insn_arm;
+ int cap_mode;
+ if (env->thumb) {
+ info->print_insn = print_insn_thumb1;
+ cap_mode = CS_MODE_THUMB;
+ } else {
+ info->print_insn = print_insn_arm;
+ cap_mode = CS_MODE_ARM;
+ }
+ if (arm_feature(env, ARM_FEATURE_V8)) {
+ cap_mode |= CS_MODE_V8;
+ }
+ if (arm_feature(env, ARM_FEATURE_M)) {
+ cap_mode |= CS_MODE_MCLASS;
+ }
+ info->cap_arch = CS_ARCH_ARM;
+ info->cap_mode = cap_mode;
}
- if (bswap_code(arm_sctlr_b(env))) {
+
+ sctlr_b = arm_sctlr_b(env);
+ if (bswap_code(sctlr_b)) {
#ifdef TARGET_WORDS_BIGENDIAN
info->endian = BFD_ENDIAN_LITTLE;
#else
info->endian = BFD_ENDIAN_BIG;
#endif
}
- if (info->read_memory_inner_func == NULL) {
- info->read_memory_inner_func = info->read_memory_func;
- info->read_memory_func = arm_read_memory_func;
- }
info->flags &= ~INSN_ARM_BE32;
- if (arm_sctlr_b(env)) {
+#ifndef CONFIG_USER_ONLY
+ if (sctlr_b) {
info->flags |= INSN_ARM_BE32;
}
+#endif
}
uint64_t arm_cpu_mp_affinity(int idx, uint8_t clustersz)