diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2017-07-27 11:59:09 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2017-07-31 13:09:52 +0100 |
| commit | 69ceea64bf565559a2b865ffb2a097d2caab805b (patch) | |
| tree | 214d7c19d6ec5272b76436eea1486eb15ef74a94 /target/arm/cpu.c | |
| parent | 8531eb4f614a60e6582d4832b15eee09f7d27874 (diff) | |
| download | qemu-69ceea64bf565559a2b865ffb2a097d2caab805b.zip | |
target/arm: Move PMSAv7 reset into arm_cpu_reset() so M profile MPUs get reset
When the PMSAv7 implementation was originally added it was for R profile
CPUs only, and reset was handled using the cpreg .resetfn hooks.
Unfortunately for M profile cores this doesn't work, because they do
not register any cpregs. Move the reset handling into arm_cpu_reset(),
where it will work for both R profile and M profile cores.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 1501153150-19984-5-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/cpu.c')
| -rw-r--r-- | target/arm/cpu.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 96d1f84030..05c038bf17 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -232,6 +232,20 @@ static void arm_cpu_reset(CPUState *s) env->vfp.xregs[ARM_VFP_FPEXC] = 0; #endif + + if (arm_feature(env, ARM_FEATURE_PMSA) && + arm_feature(env, ARM_FEATURE_V7)) { + if (cpu->pmsav7_dregion > 0) { + memset(env->pmsav7.drbar, 0, + sizeof(*env->pmsav7.drbar) * cpu->pmsav7_dregion); + memset(env->pmsav7.drsr, 0, + sizeof(*env->pmsav7.drsr) * cpu->pmsav7_dregion); + memset(env->pmsav7.dracr, 0, + sizeof(*env->pmsav7.dracr) * cpu->pmsav7_dregion); + } + env->pmsav7.rnr = 0; + } + set_flush_to_zero(1, &env->vfp.standard_fp_status); set_flush_inputs_to_zero(1, &env->vfp.standard_fp_status); set_default_nan_mode(1, &env->vfp.standard_fp_status); |