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| author | Richard Henderson <richard.henderson@linaro.org> | 2020-05-13 18:51:30 +0100 |
|---|---|---|
| committer | Alex Bennée <alex.bennee@linaro.org> | 2020-05-15 15:25:16 +0100 |
| commit | 7d8cbbabcb1234ffba9a946083073a5e01cdc020 (patch) | |
| tree | dba9b449c5970e0757f433d0333d77b87ba9e046 /target/alpha | |
| parent | e307c192ff95c7c30d1c2fa02409686d450c1ccd (diff) | |
| download | qemu-7d8cbbabcb1234ffba9a946083073a5e01cdc020.zip | |
accel/tcg: Relax va restrictions on 64-bit guests
We cannot at present limit a 64-bit guest to a virtual address
space smaller than the host. It will mostly work to ignore this
limitation, except if the guest uses high bits of the address
space for tags. But it will certainly work better, as presently
we can wind up failing to allocate the guest stack.
Widen our user-only page tree to the host or abi pointer width.
Remove the workaround for this problem from target/alpha.
Always validate guest addresses vs reserved_va, as there we
control allocation ourselves.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20200513175134.19619-7-alex.bennee@linaro.org>
Diffstat (limited to 'target/alpha')
| -rw-r--r-- | target/alpha/cpu-param.h | 15 |
1 files changed, 2 insertions, 13 deletions
diff --git a/target/alpha/cpu-param.h b/target/alpha/cpu-param.h index 692aee27ca..1153992e42 100644 --- a/target/alpha/cpu-param.h +++ b/target/alpha/cpu-param.h @@ -10,22 +10,11 @@ #define TARGET_LONG_BITS 64 #define TARGET_PAGE_BITS 13 -#ifdef CONFIG_USER_ONLY -/* - * ??? The kernel likes to give addresses in high memory. If the host has - * more virtual address space than the guest, this can lead to impossible - * allocations. Honor the long-standing assumption that only kernel addrs - * are negative, but otherwise allow allocations anywhere. This could lead - * to tricky emulation problems for programs doing tagged addressing, but - * that's far fewer than encounter the impossible allocation problem. - */ -#define TARGET_PHYS_ADDR_SPACE_BITS 63 -#define TARGET_VIRT_ADDR_SPACE_BITS 63 -#else + /* ??? EV4 has 34 phys addr bits, EV5 has 40, EV6 has 44. */ #define TARGET_PHYS_ADDR_SPACE_BITS 44 #define TARGET_VIRT_ADDR_SPACE_BITS (30 + TARGET_PAGE_BITS) -#endif + #define NB_MMU_MODES 3 #endif |