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author | Max Filippov <jcmvbkbc@gmail.com> | 2011-09-06 03:55:47 +0400 |
---|---|---|
committer | Blue Swirl <blauwirbel@gmail.com> | 2011-09-10 16:57:39 +0000 |
commit | 1ddeaa5d4277af76679d02bc59b08657c357aee6 (patch) | |
tree | c0641b7c4feaf2633c5bd99cd61138f11d54f19d /target-xtensa/translate.c | |
parent | 5b4e481b041150fbc6eaef6205095077893a3781 (diff) | |
download | qemu-1ddeaa5d4277af76679d02bc59b08657c357aee6.zip |
target-xtensa: implement SIMCALL
Tensilica iss provides support for applications running in freestanding
environment through SIMCALL command. It is used by Tensilica libc to
access argc/argv, for file I/O, etc.
Note that simcalls that accept buffer addresses expect virtual addresses.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-xtensa/translate.c')
-rw-r--r-- | target-xtensa/translate.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c index dd84dfcac5..1598e27440 100644 --- a/target-xtensa/translate.c +++ b/target-xtensa/translate.c @@ -35,6 +35,7 @@ #include "disas.h" #include "tcg-op.h" #include "qemu-log.h" +#include "sysemu.h" #include "helpers.h" #define GEN_HELPER 1 @@ -726,7 +727,13 @@ static void disas_xtensa_insn(DisasContext *dc) break; case 1: /*SIMCALL*/ - TBD(); + if (semihosting_enabled) { + gen_check_privilege(dc); + gen_helper_simcall(cpu_env); + } else { + qemu_log("SIMCALL but semihosting is disabled\n"); + gen_exception_cause(dc, ILLEGAL_INSTRUCTION_CAUSE); + } break; default: |