diff options
| author | Max Filippov <jcmvbkbc@gmail.com> | 2011-12-14 02:13:40 +0400 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2012-02-18 14:55:51 +0400 |
| commit | ab58c5b4fd07fbe94950ff459ef51d43cfb5b8c8 (patch) | |
| tree | 654ef53b2c4e0892cd8fee7e07b398b8e3114217 /target-xtensa/cpu.h | |
| parent | a044ec2a066a6002f83aba5ee937db17e7493fa8 (diff) | |
| download | qemu-ab58c5b4fd07fbe94950ff459ef51d43cfb5b8c8.zip | |
target-xtensa: add DEBUGCAUSE SR and configuration
DEBUGCAUSE SR holds information about the most recent debug exception.
See ISA, 4.7.7 for more details.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'target-xtensa/cpu.h')
| -rw-r--r-- | target-xtensa/cpu.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h index c32bf35a19..c77fe13dda 100644 --- a/target-xtensa/cpu.h +++ b/target-xtensa/cpu.h @@ -137,6 +137,7 @@ enum { PS = 230, VECBASE = 231, EXCCAUSE = 232, + DEBUGCAUSE = 233, CCOUNT = 234, PRID = 235, EXCVADDR = 238, @@ -161,6 +162,15 @@ enum { #define PS_WOE 0x40000 +#define DEBUGCAUSE_IC 0x1 +#define DEBUGCAUSE_IB 0x2 +#define DEBUGCAUSE_DB 0x4 +#define DEBUGCAUSE_BI 0x8 +#define DEBUGCAUSE_BN 0x10 +#define DEBUGCAUSE_DI 0x20 +#define DEBUGCAUSE_DBNUM 0xf00 +#define DEBUGCAUSE_DBNUM_SHIFT 8 + #define MAX_NAREG 64 #define MAX_NINTERRUPT 32 #define MAX_NLEVEL 6 @@ -279,6 +289,11 @@ typedef struct XtensaConfig { uint32_t timerint[MAX_NCCOMPARE]; unsigned nextint; unsigned extint[MAX_NINTERRUPT]; + + unsigned debug_level; + unsigned nibreak; + unsigned ndbreak; + uint32_t clock_freq_khz; xtensa_tlb itlb; |