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| author | Max Filippov <jcmvbkbc@gmail.com> | 2015-07-12 02:10:17 +0300 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2015-10-21 21:29:25 +0300 |
| commit | 5eeb40c5b1f00c4ee4fcf2f33087697d7ba6f5f6 (patch) | |
| tree | 905608e83c2d6180f862d13cec353016691725b0 /target-xtensa/cpu.h | |
| parent | 68931a4082812f56657b39168e815c48f0ab0a8c (diff) | |
| download | qemu-5eeb40c5b1f00c4ee4fcf2f33087697d7ba6f5f6.zip | |
target-xtensa: implement depbits instruction
This option provides an instruction for depositing a bit field from the
least significant position of one register to an arbitrary position in
another register.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'target-xtensa/cpu.h')
| -rw-r--r-- | target-xtensa/cpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h index 006bcb78b8..15ce0107d6 100644 --- a/target-xtensa/cpu.h +++ b/target-xtensa/cpu.h @@ -64,6 +64,7 @@ enum { XTENSA_OPTION_MP_SYNCHRO, XTENSA_OPTION_CONDITIONAL_STORE, XTENSA_OPTION_ATOMCTL, + XTENSA_OPTION_DEPBITS, /* Interrupts and exceptions */ XTENSA_OPTION_EXCEPTION, |