diff options
| author | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-29 18:20:36 +0000 |
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| committer | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-29 18:20:36 +0000 |
| commit | e30b46789326eaa7fb1f870f0c7d964263851216 (patch) | |
| tree | 91618bd96d8e5f86af34e5fcb785fd449d62f909 /target-sparc | |
| parent | 75d0187a52af2afd92c6c7f34e3f089733946766 (diff) | |
| download | qemu-e30b46789326eaa7fb1f870f0c7d964263851216.zip | |
MicroSparc I didn't have fsmuld op
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4618 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sparc')
| -rw-r--r-- | target-sparc/cpu.h | 5 | ||||
| -rw-r--r-- | target-sparc/helper.c | 22 | ||||
| -rw-r--r-- | target-sparc/translate.c | 1 |
3 files changed, 19 insertions, 9 deletions
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index ba3ee01b08..539fd2d264 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -284,17 +284,18 @@ typedef struct CPUSPARCState { #define CPU_FEATURE_FMUL (1 << 7) #define CPU_FEATURE_VIS1 (1 << 8) #define CPU_FEATURE_VIS2 (1 << 9) +#define CPU_FEATURE_FSMULD (1 << 10) #ifndef TARGET_SPARC64 #define CPU_DEFAULT_FEATURES (CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP | \ CPU_FEATURE_MUL | CPU_FEATURE_DIV | \ CPU_FEATURE_FLUSH | CPU_FEATURE_FSQRT | \ - CPU_FEATURE_FMUL) + CPU_FEATURE_FMUL | CPU_FEATURE_FSMULD) #else #define CPU_DEFAULT_FEATURES (CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP | \ CPU_FEATURE_MUL | CPU_FEATURE_DIV | \ CPU_FEATURE_FLUSH | CPU_FEATURE_FSQRT | \ CPU_FEATURE_FMUL | CPU_FEATURE_VIS1 | \ - CPU_FEATURE_VIS2) + CPU_FEATURE_VIS2 | CPU_FEATURE_FSMULD) #endif #if defined(TARGET_SPARC64) diff --git a/target-sparc/helper.c b/target-sparc/helper.c index 8bf40e4aea..4537314d69 100644 --- a/target-sparc/helper.c +++ b/target-sparc/helper.c @@ -1098,7 +1098,7 @@ static const sparc_def_t sparc_defs[] = { .mmu_cxr_mask = 0x0000003f, .mmu_sfsr_mask = 0xffffffff, .mmu_trcr_mask = 0xffffffff, - .features = CPU_FEATURE_FLOAT, + .features = CPU_FEATURE_FLOAT | CPU_FEATURE_FSMULD, }, { .name = "Fujitsu MB86904", @@ -1134,7 +1134,8 @@ static const sparc_def_t sparc_defs[] = { .mmu_cxr_mask = 0x0000003f, .mmu_sfsr_mask = 0xffffffff, .mmu_trcr_mask = 0xffffffff, - .features = CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP | CPU_FEATURE_FSQRT, + .features = CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP | CPU_FEATURE_FSQRT | + CPU_FEATURE_FSMULD, }, { .name = "Cypress CY7C601", @@ -1146,7 +1147,8 @@ static const sparc_def_t sparc_defs[] = { .mmu_cxr_mask = 0x0000003f, .mmu_sfsr_mask = 0xffffffff, .mmu_trcr_mask = 0xffffffff, - .features = CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP | CPU_FEATURE_FSQRT, + .features = CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP | CPU_FEATURE_FSQRT | + CPU_FEATURE_FSMULD, }, { .name = "Cypress CY7C611", @@ -1158,7 +1160,8 @@ static const sparc_def_t sparc_defs[] = { .mmu_cxr_mask = 0x0000003f, .mmu_sfsr_mask = 0xffffffff, .mmu_trcr_mask = 0xffffffff, - .features = CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP | CPU_FEATURE_FSQRT, + .features = CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP | CPU_FEATURE_FSQRT | + CPU_FEATURE_FSMULD, }, { .name = "TI SuperSparc II", @@ -1182,7 +1185,9 @@ static const sparc_def_t sparc_defs[] = { .mmu_cxr_mask = 0x0000003f, .mmu_sfsr_mask = 0x00016fff, .mmu_trcr_mask = 0x0000003f, - .features = CPU_DEFAULT_FEATURES, + .features = CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP | CPU_FEATURE_MUL | + CPU_FEATURE_DIV | CPU_FEATURE_FLUSH | CPU_FEATURE_FSQRT | + CPU_FEATURE_FMUL, }, { .name = "TI MicroSparc II", @@ -1266,7 +1271,8 @@ static const sparc_def_t sparc_defs[] = { .mmu_cxr_mask = 0x0000003f, .mmu_sfsr_mask = 0xffffffff, .mmu_trcr_mask = 0xffffffff, - .features = CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP | CPU_FEATURE_FSQRT, + .features = CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP | CPU_FEATURE_FSQRT | + CPU_FEATURE_FSMULD, }, { .name = "Matsushita MN10501", @@ -1278,7 +1284,8 @@ static const sparc_def_t sparc_defs[] = { .mmu_cxr_mask = 0x0000003f, .mmu_sfsr_mask = 0xffffffff, .mmu_trcr_mask = 0xffffffff, - .features = CPU_FEATURE_FLOAT | CPU_FEATURE_MUL | CPU_FEATURE_FSQRT, + .features = CPU_FEATURE_FLOAT | CPU_FEATURE_MUL | CPU_FEATURE_FSQRT | + CPU_FEATURE_FSMULD, }, { .name = "Weitek W8601", @@ -1330,6 +1337,7 @@ static const char * const feature_name[] = { "fmul", "vis1", "vis2", + "fsmuld", }; static void print_features(FILE *f, diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 9ff48b2179..eb0ab3343f 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -2511,6 +2511,7 @@ static void disas_sparc_insn(DisasContext * dc) gen_op_store_QT0_fpr(QFPREG(rd)); break; case 0x69: + CHECK_FPU_FEATURE(dc, FSMULD); gen_op_load_fpr_FT0(rs1); gen_op_load_fpr_FT1(rs2); gen_clear_float_exceptions(); |