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authorblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2007-05-02 16:37:44 +0000
committerblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2007-05-02 16:37:44 +0000
commit14a1120e5c8c4c29441141b4657f91e04d10fac0 (patch)
tree77501d3316e14aacfa87d5c83594990018d99e64 /target-sparc
parent5a1237c45f8ae84da2cbffe07a344e29952c689b (diff)
downloadqemu-14a1120e5c8c4c29441141b4657f91e04d10fac0.zip
Handle division by zero case in Sparc64 udivx and sdivx ops
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2767 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sparc')
-rw-r--r--target-sparc/op.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/target-sparc/op.c b/target-sparc/op.c
index 7a4bd79575..5fbbd6db0f 100644
--- a/target-sparc/op.c
+++ b/target-sparc/op.c
@@ -926,12 +926,18 @@ void OPPROTO op_mulx_T1_T0(void)
void OPPROTO op_udivx_T1_T0(void)
{
+ if (T1 == 0) {
+ raise_exception(TT_DIV_ZERO);
+ }
T0 /= T1;
FORCE_RET();
}
void OPPROTO op_sdivx_T1_T0(void)
{
+ if (T1 == 0) {
+ raise_exception(TT_DIV_ZERO);
+ }
if (T0 == INT64_MIN && T1 == -1)
T0 = INT64_MIN;
else