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authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-05-13 16:33:43 +0000
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-05-13 16:33:43 +0000
commitf09111e0886d16425fa59ec11cfb3293095cb06c (patch)
tree0bc295fad8a768ac2e62be159f006ecabbb2fa7c /target-sh4/translate.c
parent7b62f20c085ca13cbab84a07b0f52e5582a5c450 (diff)
downloadqemu-f09111e0886d16425fa59ec11cfb3293095cb06c.zip
Fix XHACK() macro and use FREG if possible, by Magnus Damm.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2815 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sh4/translate.c')
-rw-r--r--target-sh4/translate.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index d53e28bd2d..c70288ebfb 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -236,7 +236,7 @@ static void gen_delayed_conditional_jump(DisasContext * ctx)
? (x) + 16 : (x))
#define FREG(x) (ctx->fpscr & FPSCR_FR ? (x) ^ 0x10 : (x))
-#define XHACK(x) (((x) & 1 ) << 4 | ((x) & 0xe ) << 1)
+#define XHACK(x) ((((x) & 1 ) << 4) | ((x) & 0xe))
#define XREG(x) (ctx->fpscr & FPSCR_FR ? XHACK(x) ^ 0x10 : XHACK(x))
#define CHECK_NOT_DELAY_SLOT \
@@ -685,7 +685,7 @@ void decode_opc(DisasContext * ctx)
} else {
gen_op_movl_rN_T0(REG(B7_4));
gen_op_ldfl_T0_FT0(ctx);
- gen_op_fmov_FT0_frN(XREG(B11_8));
+ gen_op_fmov_FT0_frN(FREG(B11_8));
}
return;
case 0xf009: /* fmov @Rm+,{F,D,X}Rn */
@@ -704,7 +704,7 @@ void decode_opc(DisasContext * ctx)
} else {
gen_op_movl_rN_T0(REG(B7_4));
gen_op_ldfl_T0_FT0(ctx);
- gen_op_fmov_FT0_frN(XREG(B11_8));
+ gen_op_fmov_FT0_frN(FREG(B11_8));
gen_op_inc4_rN(REG(B7_4));
}
return;
@@ -745,7 +745,7 @@ void decode_opc(DisasContext * ctx)
gen_op_movl_rN_T0(REG(B7_4));
gen_op_add_rN_T0(REG(0));
gen_op_ldfl_T0_FT0(ctx);
- gen_op_fmov_FT0_frN(XREG(B11_8));
+ gen_op_fmov_FT0_frN(FREG(B11_8));
}
return;
case 0xf007: /* fmov {F,D,X}Rn,@(R0,Rn) */