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| author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-12-13 18:57:37 +0000 |
|---|---|---|
| committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-12-13 18:57:37 +0000 |
| commit | 71968fa65b9088fa746a5b99c093a7e835e3fade (patch) | |
| tree | e24f5bb18f1bfe5a67e64210ea92c21c031cc6a6 /target-sh4/translate.c | |
| parent | a9c43f8ede0e0c7b89432e0ddd4894c5f917fd0b (diff) | |
| download | qemu-71968fa65b9088fa746a5b99c093a7e835e3fade.zip | |
target-sh4: add prefi, icbi, synco
(Vladimir Prus)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6013 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sh4/translate.c')
| -rw-r--r-- | target-sh4/translate.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/target-sh4/translate.c b/target-sh4/translate.c index 782249628c..d5d5d50977 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -49,6 +49,7 @@ typedef struct DisasContext { int memidx; uint32_t delayed_pc; int singlestep_enabled; + uint32_t features; } DisasContext; #if defined(CONFIG_USER_ONLY) @@ -206,6 +207,7 @@ typedef struct { uint32_t pvr; uint32_t prr; uint32_t cvr; + uint32_t features; } sh4_def_t; static sh4_def_t sh4_defs[] = { @@ -227,6 +229,7 @@ static sh4_def_t sh4_defs[] = { .pvr = 0x10300700, .prr = 0x00000200, .cvr = 0x71440211, + .features = SH_FEATURE_SH4A, }, }; @@ -271,6 +274,7 @@ CPUSH4State *cpu_sh4_init(const char *cpu_model) env = qemu_mallocz(sizeof(CPUSH4State)); if (!env) return NULL; + env->features = def->features; cpu_exec_init(env); sh4_translate_init(); env->cpu_model_str = cpu_model; @@ -1562,6 +1566,21 @@ static void _decode_opc(DisasContext * ctx) return; case 0x0083: /* pref @Rn */ return; + case 0x00d3: /* prefi @Rn */ + if (ctx->features & SH_FEATURE_SH4A) + return; + else + break; + case 0x00e3: /* icbi @Rn */ + if (ctx->features & SH_FEATURE_SH4A) + return; + else + break; + case 0x00ab: /* synco */ + if (ctx->features & SH_FEATURE_SH4A) + return; + else + break; case 0x4024: /* rotcl Rn */ { TCGv tmp = tcg_temp_new(); @@ -1805,6 +1824,7 @@ gen_intermediate_code_internal(CPUState * env, TranslationBlock * tb, ctx.delayed_pc = -1; /* use delayed pc from env pointer */ ctx.tb = tb; ctx.singlestep_enabled = env->singlestep_enabled; + ctx.features = env->features; #ifdef DEBUG_DISAS if (loglevel & CPU_LOG_TB_CPU) { |