diff options
| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2016-06-07 12:50:24 +1000 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2016-06-07 13:10:44 +1000 |
| commit | dfdd3e43620a6cd4f2be31da5a257c84a16fc000 (patch) | |
| tree | 8821f337b7cb5626cf83598cc7f238075a8b745b /target-ppc | |
| parent | 8eb0f5637219820bfda8082296e1d3e39132d8de (diff) | |
| download | qemu-dfdd3e43620a6cd4f2be31da5a257c84a16fc000.zip | |
ppc: POWER7 has lq/stq instructions and stq need to check ISA
The PPC_64BX instruction flag is used for a couple of newer
instructions currently on POWER8 but our implementation for
them works for POWER7 too (and already does the proper checking
of what is permitted) with one exception: stq needs to check
the ISA version.
This fixes the latter and add the instructions to POWER7
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target-ppc')
| -rw-r--r-- | target-ppc/translate.c | 5 | ||||
| -rw-r--r-- | target-ppc/translate_init.c | 2 |
2 files changed, 5 insertions, 2 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 5150455ef9..0c2239aa67 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -3047,10 +3047,13 @@ static void gen_std(DisasContext *ctx) rs = rS(ctx->opcode); if ((ctx->opcode & 0x3) == 0x2) { /* stq */ - bool legal_in_user_mode = (ctx->insns_flags2 & PPC2_LSQ_ISA207) != 0; bool le_is_supported = (ctx->insns_flags2 & PPC2_LSQ_ISA207) != 0; + if (!(ctx->insns_flags & PPC_64BX)) { + gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); + } + if (!legal_in_user_mode && ctx->pr) { gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); return; diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index ad6f2f3be5..a1db5009c4 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -8377,7 +8377,7 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data) PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | PPC_MEM_SYNC | PPC_MEM_EIEIO | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | - PPC_64B | PPC_64H | PPC_ALTIVEC | + PPC_64B | PPC_64H | PPC_64BX | PPC_ALTIVEC | PPC_SEGMENT_64B | PPC_SLBI | PPC_POPCNTB | PPC_POPCNTWD; pcc->insns_flags2 = PPC2_VSX | PPC2_DFP | PPC2_DBRX | PPC2_ISA205 | |