diff options
| author | Anton Blanchard <anton@samba.org> | 2013-08-07 10:47:00 +1000 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2013-09-02 10:06:41 +0200 |
| commit | bb429d224733c263456c105eab93cd2b5e55add2 (patch) | |
| tree | 9f1a634b9726c6963fe32006af9e733b33e169c1 /target-ppc | |
| parent | 1e0c7e554e449abb7bf759339ca2cf8cda232532 (diff) | |
| download | qemu-bb429d224733c263456c105eab93cd2b5e55add2.zip | |
target-ppc: POWER7 supports the MSR_LE bit
Add MSR_LE to the msr_mask for POWER7.
Signed-off-by: Anton Blanchard <anton@samba.org>
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc')
| -rw-r--r-- | target-ppc/translate_init.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 609f797083..d2645bad28 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -7227,7 +7227,7 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data) PPC_SEGMENT_64B | PPC_SLBI | PPC_POPCNTB | PPC_POPCNTWD; pcc->insns_flags2 = PPC2_VSX | PPC2_DFP | PPC2_DBRX | PPC2_ISA205; - pcc->msr_mask = 0x800000000204FF36ULL; + pcc->msr_mask = 0x800000000204FF37ULL; pcc->mmu_model = POWERPC_MMU_2_06; #if defined(CONFIG_SOFTMMU) pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault; |