summaryrefslogtreecommitdiff
path: root/target-ppc/translate_init.c
diff options
context:
space:
mode:
authorAlexander Graf <agraf@suse.de>2011-10-18 02:00:51 +0200
committerAlexander Graf <agraf@suse.de>2011-10-30 20:03:26 +0100
commitf0ad8c340145b246982885addef1aac183790706 (patch)
treea4412183c79af12517fa87d9d4930df6fbe0b195 /target-ppc/translate_init.c
parent8b242eba641a6106db2d3b0356687f8e7e08e568 (diff)
downloadqemu-f0ad8c340145b246982885addef1aac183790706.zip
PPC: Disable non-440 CPUs for ppcemb target
The sole reason we have the ppcemb target is to support MMUs that have less than the usual 4k possible page size. There are very few of these chips and I don't want to add additional QA and testing burden to everyone to ensure that code still works when TARGET_PAGE_SIZE is not 4k. So this patch disables all CPUs except for MMU_BOOKE capable ones from the ppcemb target. Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/translate_init.c')
-rw-r--r--target-ppc/translate_init.c24
1 files changed, 24 insertions, 0 deletions
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 7de097d945..f0ae1d1764 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -10047,11 +10047,27 @@ int cpu_ppc_register_internal (CPUPPCState *env, const ppc_def_t *def)
return 0;
}
+static bool ppc_cpu_usable(const ppc_def_t *def)
+{
+#if defined(TARGET_PPCEMB)
+ /* When using the ppcemb target, we only support 440 style cores */
+ if (def->mmu_model != POWERPC_MMU_BOOKE) {
+ return false;
+ }
+#endif
+
+ return true;
+}
+
const ppc_def_t *ppc_find_by_pvr(uint32_t pvr)
{
int i;
for (i = 0; i < ARRAY_SIZE(ppc_defs); i++) {
+ if (!ppc_cpu_usable(&ppc_defs[i])) {
+ continue;
+ }
+
/* If we have an exact match, we're done */
if (pvr == ppc_defs[i].pvr) {
return &ppc_defs[i];
@@ -10091,6 +10107,10 @@ const ppc_def_t *cpu_ppc_find_by_name (const char *name)
ret = NULL;
max = ARRAY_SIZE(ppc_defs);
for (i = 0; i < max; i++) {
+ if (!ppc_cpu_usable(&ppc_defs[i])) {
+ continue;
+ }
+
if (strcasecmp(name, ppc_defs[i].name) == 0) {
ret = &ppc_defs[i];
break;
@@ -10106,6 +10126,10 @@ void ppc_cpu_list (FILE *f, fprintf_function cpu_fprintf)
max = ARRAY_SIZE(ppc_defs);
for (i = 0; i < max; i++) {
+ if (!ppc_cpu_usable(&ppc_defs[i])) {
+ continue;
+ }
+
(*cpu_fprintf)(f, "PowerPC %-16s PVR %08x\n",
ppc_defs[i].name, ppc_defs[i].pvr);
}