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authorAlexey Kardashevskiy <aik@ozlabs.ru>2014-06-04 22:50:51 +1000
committerAlexander Graf <agraf@suse.de>2014-06-16 13:24:44 +0200
commit6a1eed3f49e0fc5ef94906c0eab5314bc32bc8ae (patch)
tree59721cbc5637f8a1c1ccd971544dbb85df7b21d1 /target-ppc/translate_init.c
parent5db7d4faa328243153ddfe2e307f8d2b9ec20466 (diff)
downloadqemu-6a1eed3f49e0fc5ef94906c0eab5314bc32bc8ae.zip
target-ppc: Make use of gen_spr_book3s_altivec() for POWER7/8
This replaces VRSAVE registration and vscr_init() call with gen_spr_book3s_altivec() which is generic and does the same thing if insns_flags has PPC_ALTIVEC bit set (which POWER7/8 have set). Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/translate_init.c')
-rw-r--r--target-ppc/translate_init.c8
1 files changed, 1 insertions, 7 deletions
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index ac8c8c1124..3617f5b34b 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7785,6 +7785,7 @@ static void init_proc_POWER7 (CPUPPCState *env)
{
gen_spr_ne_601(env);
gen_spr_7xx(env);
+ gen_spr_book3s_altivec(env);
/* Time base */
gen_tbl(env);
#if !defined(CONFIG_USER_ONLY)
@@ -7808,10 +7809,6 @@ static void init_proc_POWER7 (CPUPPCState *env)
gen_spr_power6_common(env);
gen_spr_power6_dbg(env);
gen_spr_amr(env);
- spr_register(env, SPR_VRSAVE, "SPR_VRSAVE",
- &spr_read_generic, &spr_write_generic,
- &spr_read_generic, &spr_write_generic,
- 0x00000000);
/* Logical partitionning */
spr_register_kvm(env, SPR_LPCR, "LPCR",
SPR_NOACCESS, SPR_NOACCESS,
@@ -7826,9 +7823,6 @@ static void init_proc_POWER7 (CPUPPCState *env)
/* Allocate hardware IRQ controller */
ppcPOWER7_irq_init(env);
- /* Can't find information on what this should be on reset. This
- * value is the one used by 74xx processors. */
- vscr_init(env, 0x00010000);
}
POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data)