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authorAlexey Kardashevskiy <aik@ozlabs.ru>2014-07-10 00:40:56 +1000
committerAlexander Graf <agraf@suse.de>2014-07-15 16:11:58 +0200
commit063cac5326518abfcd4f3f0eaace3fa9b1a97424 (patch)
treedfea5e412503492662c656d6a5949818d548e3a6 /target-ppc/translate_init.c
parent0e16297461264b3ea8f7282d1195cf53aa8a707c (diff)
downloadqemu-063cac5326518abfcd4f3f0eaace3fa9b1a97424.zip
target-ppc: Fix number of threads per core limit
The number of threads per core is different for POWER6/7/8 CPUs. Guest systems do not expect to see more threads per core than a specific CPU supports so we need to limit this number. This limit is implemented by ppc_get_compat_smt_threads(). However it has a problem as it checks for PCR (Processor Compatibility Register) mask, 2.05 means 2 threads per core, 2.06 - 4 threads. For POWER8 one would expect PCR_COMPAT_2_07 bit set and ppc_get_compat_smt_threads() checking for it to return 8 threads per core. But the latest PowerISA spec now is 2.07 and there is no 2.07 compatibility mode defined, QEMU does not define it either (will be in PowerISA 2.08). Instead of relying on a PCR mask, this uses kvmppc_smt_threads() which returns the maximum supported threads number for KVM or 1 for TCG. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/translate_init.c')
-rw-r--r--target-ppc/translate_init.c18
1 files changed, 5 insertions, 13 deletions
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 5eacd46a52..48177ed0a0 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -9098,29 +9098,21 @@ static void ppc_cpu_unrealizefn(DeviceState *dev, Error **errp)
int ppc_get_compat_smt_threads(PowerPCCPU *cpu)
{
- int ret = smp_threads;
- PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
+ int ret = MIN(smp_threads, kvmppc_smt_threads());
switch (cpu->cpu_version) {
case CPU_POWERPC_LOGICAL_2_05:
- ret = 2;
+ ret = MIN(ret, 2);
break;
case CPU_POWERPC_LOGICAL_2_06:
- ret = 4;
+ ret = MIN(ret, 4);
break;
case CPU_POWERPC_LOGICAL_2_07:
- ret = 8;
- break;
- default:
- if (pcc->pcr_mask & PCR_COMPAT_2_06) {
- ret = 4;
- } else if (pcc->pcr_mask & PCR_COMPAT_2_05) {
- ret = 2;
- }
+ ret = MIN(ret, 8);
break;
}
- return MIN(ret, smp_threads);
+ return ret;
}
int ppc_set_compat(PowerPCCPU *cpu, uint32_t cpu_version)