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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2016-03-21 13:52:34 +0100
committerDavid Gibson <david@gibson.dropbear.id.au>2016-03-24 11:17:34 +1100
commit26a7f1291bb5581e51c413d744207d0a5910ff4c (patch)
treed1fcc2a2f3462f6ea266a0efceede3bdefde226d /target-ppc/cpu.h
parentf401dd32cb8e9ef68bc4f0d600479f670c2bf39a (diff)
downloadqemu-26a7f1291bb5581e51c413d744207d0a5910ff4c.zip
ppc: Create cpu_ppc_set_papr() helper
And move the code adjusting the MSR mask and calling kvmppc_set_papr() to it. This allows us to add a few more things such as disabling setting of MSR:HV and appropriate LPCR bits which will be used when fixing the exception model. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [clg: removed LPCR setting ] Signed-off-by: Cédric Le Goater <clg@fr.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target-ppc/cpu.h')
-rw-r--r--target-ppc/cpu.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 9ce301f189..a7da0d3e95 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1268,6 +1268,7 @@ void store_booke_tcr (CPUPPCState *env, target_ulong val);
void store_booke_tsr (CPUPPCState *env, target_ulong val);
void ppc_tlb_invalidate_all (CPUPPCState *env);
void ppc_tlb_invalidate_one (CPUPPCState *env, target_ulong addr);
+void cpu_ppc_set_papr(PowerPCCPU *cpu);
#endif
#endif