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author | Richard Henderson <rth@twiddle.net> | 2016-04-20 11:39:35 -0700 |
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committer | Richard Henderson <rth@twiddle.net> | 2016-06-05 09:26:24 -0700 |
commit | 4910e6e42e5827ccc10791eef8bc98e1cb3e1adf (patch) | |
tree | 7f8ddee9e0a7176d4bbdae29a62e0d8d5e18a785 /target-openrisc | |
parent | 6b3532b20b787cbd697a68b383232f5c3b39bd1e (diff) | |
download | qemu-4910e6e42e5827ccc10791eef8bc98e1cb3e1adf.zip |
target-*: dfilter support for in_asm
The arm target was handled by 06486077, but other targets
were ignored. This handles all the rest which actually support
disassembly (that is, skipping moxie and tilegx).
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-openrisc')
-rw-r--r-- | target-openrisc/translate.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c index d4f1f260e4..c08876b14a 100644 --- a/target-openrisc/translate.c +++ b/target-openrisc/translate.c @@ -1751,7 +1751,8 @@ void gen_intermediate_code(CPUOpenRISCState *env, struct TranslationBlock *tb) tb->icount = num_insns; #ifdef DEBUG_DISAS - if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) { + if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM) + && qemu_log_in_addr_range(pc_start)) { qemu_log("\n"); log_target_disas(cs, pc_start, dc->pc - pc_start, 0); qemu_log("\nisize=%d osize=%d\n", |