diff options
| author | Nathan Froyd <froydnj@codesourcery.com> | 2009-12-08 08:06:23 -0800 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2009-12-13 20:20:19 +0100 |
| commit | 32188a03dae09c8a02bc72f26ece4a98183cc787 (patch) | |
| tree | 65801af8c3f32f6a946420a9f0d959b1696042b4 /target-mips/op_helper.c | |
| parent | 79ef2c4cdbe73955b1394f0fd9517c5a79e0455e (diff) | |
| download | qemu-32188a03dae09c8a02bc72f26ece4a98183cc787.zip | |
target-mips: change interrupt bits to be mips16-aware
We need to stash the operating mode into the low bit of the error PC and
restore it on return from interrupts.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-mips/op_helper.c')
| -rw-r--r-- | target-mips/op_helper.c | 17 |
1 files changed, 14 insertions, 3 deletions
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c index be75af5e6e..cccfd8e07e 100644 --- a/target-mips/op_helper.c +++ b/target-mips/op_helper.c @@ -1684,14 +1684,24 @@ static void debug_post_eret (void) } } +static void set_pc (target_ulong error_pc) +{ + env->active_tc.PC = error_pc & ~(target_ulong)1; + if (error_pc & 1) { + env->hflags |= MIPS_HFLAG_M16; + } else { + env->hflags &= ~(MIPS_HFLAG_M16); + } +} + void helper_eret (void) { debug_pre_eret(); if (env->CP0_Status & (1 << CP0St_ERL)) { - env->active_tc.PC = env->CP0_ErrorEPC; + set_pc(env->CP0_ErrorEPC); env->CP0_Status &= ~(1 << CP0St_ERL); } else { - env->active_tc.PC = env->CP0_EPC; + set_pc(env->CP0_EPC); env->CP0_Status &= ~(1 << CP0St_EXL); } compute_hflags(env); @@ -1702,7 +1712,8 @@ void helper_eret (void) void helper_deret (void) { debug_pre_eret(); - env->active_tc.PC = env->CP0_DEPC; + set_pc(env->CP0_DEPC); + env->hflags &= MIPS_HFLAG_DM; compute_hflags(env); debug_post_eret(); |