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author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-10-28 19:45:05 +0000 |
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committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-10-28 19:45:05 +0000 |
commit | 623a930ec30a75e6d6482ca8208d7bf1ca8d359b (patch) | |
tree | 6953605abd679c357ffba546fd43907a4ce9ea0e /target-mips/op.c | |
parent | 8e129e0748f866d730f1e39bff296219fedac244 (diff) | |
download | qemu-623a930ec30a75e6d6482ca8208d7bf1ca8d359b.zip |
Implement missing MIPS supervisor mode bits.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3472 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/op.c')
-rw-r--r-- | target-mips/op.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/target-mips/op.c b/target-mips/op.c index 9e8324d49b..f29134567c 100644 --- a/target-mips/op.c +++ b/target-mips/op.c @@ -286,6 +286,10 @@ void op_store_LO (void) #include "op_mem.c" #undef MEMSUFFIX +#define MEMSUFFIX _super +#include "op_mem.c" +#undef MEMSUFFIX + #define MEMSUFFIX _kernel #include "op_mem.c" #undef MEMSUFFIX @@ -298,7 +302,7 @@ void op_addr_add (void) with Status_UX = 0 should be casted to 32-bit and sign extended. See the MIPS64 PRA manual, section 4.10. */ #if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64) - if ((env->hflags & MIPS_HFLAG_UM) && + if (((env->hflags & MIPS_HFLAG_KSU) == MIPS_HFLAG_UM) && !(env->CP0_Status & (1 << CP0St_UX))) T0 = (int64_t)(int32_t)(T0 + T1); else @@ -1269,7 +1273,7 @@ void op_mftc0_status(void) T0 = env->CP0_Status & ~0xf1000018; T0 |= tcstatus & (0xf << CP0TCSt_TCU0); T0 |= (tcstatus & (1 << CP0TCSt_TMX)) >> (CP0TCSt_TMX - CP0St_MX); - T0 |= (tcstatus & (0x3 << CP0TCSt_TKSU)) >> (CP0TCSt_TKSU - CP0St_R0); + T0 |= (tcstatus & (0x3 << CP0TCSt_TKSU)) >> (CP0TCSt_TKSU - CP0St_KSU); RETURN(); } @@ -1833,7 +1837,7 @@ void op_mttc0_status(void) env->CP0_Status = T0 & ~0xf1000018; tcstatus = (tcstatus & ~(0xf << CP0TCSt_TCU0)) | (T0 & (0xf << CP0St_CU0)); tcstatus = (tcstatus & ~(1 << CP0TCSt_TMX)) | ((T0 & (1 << CP0St_MX)) << (CP0TCSt_TMX - CP0St_MX)); - tcstatus = (tcstatus & ~(0x3 << CP0TCSt_TKSU)) | ((T0 & (0x3 << CP0St_R0)) << (CP0TCSt_TKSU - CP0St_R0)); + tcstatus = (tcstatus & ~(0x3 << CP0TCSt_TKSU)) | ((T0 & (0x3 << CP0St_KSU)) << (CP0TCSt_TKSU - CP0St_KSU)); env->CP0_TCStatus[other_tc] = tcstatus; RETURN(); } |