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authorLeon Alrae <leon.alrae@imgtec.com>2014-07-07 11:23:59 +0100
committerLeon Alrae <leon.alrae@imgtec.com>2014-11-03 11:48:34 +0000
commit7207c7f9d74816c32783a394d8072d1f978157ac (patch)
tree05c22755fc89eceee9d23533de96bc06d9abdd97 /target-mips/helper.h
parent2fb58b73746e2f99ac85e82160277b18b18279be (diff)
downloadqemu-7207c7f9d74816c32783a394d8072d1f978157ac.zip
target-mips: update PageGrain and m{t,f}c0 EntryLo{0,1}
PageGrain needs rw bitmask which differs between MIPS architectures. In pre-R6 if RIXI is supported, PageGrain.XIE and PageGrain.RIE are writeable, whereas in R6 they are read-only 1. On MIPS64 mtc0 instruction left shifts bits 31:30 for MIPS32 backward compatiblity, therefore there are separate mtc0 and dmtc0 helpers. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>
Diffstat (limited to 'target-mips/helper.h')
-rw-r--r--target-mips/helper.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/target-mips/helper.h b/target-mips/helper.h
index a127db55c2..e7e0c8c4ca 100644
--- a/target-mips/helper.h
+++ b/target-mips/helper.h
@@ -152,6 +152,11 @@ DEF_HELPER_2(mtc0_datalo, void, env, tl)
DEF_HELPER_2(mtc0_taghi, void, env, tl)
DEF_HELPER_2(mtc0_datahi, void, env, tl)
+#if defined(TARGET_MIPS64)
+DEF_HELPER_2(dmtc0_entrylo0, void, env, i64)
+DEF_HELPER_2(dmtc0_entrylo1, void, env, i64)
+#endif
+
/* MIPS MT functions */
DEF_HELPER_2(mftgpr, tl, env, i32)
DEF_HELPER_2(mftlo, tl, env, i32)