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authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-05-07 13:55:33 +0000
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-05-07 13:55:33 +0000
commit5a5012ecbdcd341bb1d2e8200db91f6212aa44df (patch)
treefd30050630993cfe86d7005645af6161a9273b68 /target-mips/exec.h
parent8b4af7052757965b9a03998f400955016b456431 (diff)
downloadqemu-5a5012ecbdcd341bb1d2e8200db91f6212aa44df.zip
MIPS 64-bit FPU support, plus some collateral bugfixes in the
conditional branch handling. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2779 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/exec.h')
-rw-r--r--target-mips/exec.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/target-mips/exec.h b/target-mips/exec.h
index b00263f1b1..d9160a1f3a 100644
--- a/target-mips/exec.h
+++ b/target-mips/exec.h
@@ -29,12 +29,18 @@ register target_ulong T2 asm(AREG3);
#define FST0 (env->ft0.fs[FP_ENDIAN_IDX])
#define FST1 (env->ft1.fs[FP_ENDIAN_IDX])
#define FST2 (env->ft2.fs[FP_ENDIAN_IDX])
+#define FSTH0 (env->ft0.fs[!FP_ENDIAN_IDX])
+#define FSTH1 (env->ft1.fs[!FP_ENDIAN_IDX])
+#define FSTH2 (env->ft2.fs[!FP_ENDIAN_IDX])
#define DT0 (env->ft0.d)
#define DT1 (env->ft1.d)
#define DT2 (env->ft2.d)
#define WT0 (env->ft0.w[FP_ENDIAN_IDX])
#define WT1 (env->ft1.w[FP_ENDIAN_IDX])
#define WT2 (env->ft2.w[FP_ENDIAN_IDX])
+#define WTH0 (env->ft0.w[!FP_ENDIAN_IDX])
+#define WTH1 (env->ft1.w[!FP_ENDIAN_IDX])
+#define WTH2 (env->ft2.w[!FP_ENDIAN_IDX])
#endif
#if defined (DEBUG_OP)