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author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-04 08:16:10 +0000 |
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committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-04 08:16:10 +0000 |
commit | 3945462805beb52cdc3e42eff948afbe2e7c4683 (patch) | |
tree | ad88300b5a090520568839df676d1ff0e39cdebd /target-mips/cpu.h | |
parent | f730fd27b8e358efb3f7b31a564ecc6b1543b689 (diff) | |
download | qemu-3945462805beb52cdc3e42eff948afbe2e7c4683.zip |
Simplify mips branch handling. Retire T2 from use. Use TCG for branches.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4320 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/cpu.h')
-rw-r--r-- | target-mips/cpu.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h index 4e0a09d761..957b6e8d66 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -148,7 +148,6 @@ struct CPUMIPSState { #if TARGET_LONG_BITS > HOST_LONG_BITS target_ulong t0; target_ulong t1; - target_ulong t2; #endif target_ulong HI[MIPS_TC_MAX][MIPS_DSP_ACC]; target_ulong LO[MIPS_TC_MAX][MIPS_DSP_ACC]; |