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authorJan Kiszka <jan.kiszka@siemens.com>2011-03-02 08:56:07 +0100
committerMarcelo Tosatti <mtosatti@redhat.com>2011-03-15 01:19:05 -0300
commit185592324ff92f3c7c5edb4d9e96d40a137ecdcd (patch)
tree2c3737b14d32dadc16ac4ce364eead821523e8d5 /target-i386
parentac098781583bb1ca8369b5bd81fa5fbafa86231c (diff)
downloadqemu-185592324ff92f3c7c5edb4d9e96d40a137ecdcd.zip
x86: Perform implicit mcg_status reset
Reorder mcg_status in CPUState to achieve automatic clearing on reset. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: Huang Ying <ying.huang@intel.com> CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> CC: Jin Dongming <jin.dongming@np.css.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Diffstat (limited to 'target-i386')
-rw-r--r--target-i386/cpu.h3
-rw-r--r--target-i386/helper.c2
2 files changed, 2 insertions, 3 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 5f1df8b4d3..75156e761a 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -687,6 +687,8 @@ typedef struct CPUX86State {
uint64_t pat;
+ uint64_t mcg_status;
+
/* exception/interrupt handling */
int error_code;
int exception_is_int;
@@ -741,7 +743,6 @@ typedef struct CPUX86State {
struct DeviceState *apic_state;
uint64_t mcg_cap;
- uint64_t mcg_status;
uint64_t mcg_ctl;
uint64_t mce_banks[MCE_BANKS_DEF*4];
diff --git a/target-i386/helper.c b/target-i386/helper.c
index f0c546df5c..f41416f2ee 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -101,8 +101,6 @@ void cpu_reset(CPUX86State *env)
env->dr[7] = DR7_FIXED_1;
cpu_breakpoint_remove_all(env, BP_CPU);
cpu_watchpoint_remove_all(env, BP_CPU);
-
- env->mcg_status = 0;
}
void cpu_x86_close(CPUX86State *env)