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| author | Will Newton <will.newton@linaro.org> | 2014-01-07 17:19:13 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-01-08 19:07:22 +0000 |
| commit | 8ed697e88b7ead01edca6bf762921b962c265c82 (patch) | |
| tree | 140481735b87148fac3fc4c5b29fa49ccf7be1f5 /target-arm | |
| parent | f9288a76f1819c2dbf8d2873aebab6aec0f461f5 (diff) | |
| download | qemu-8ed697e88b7ead01edca6bf762921b962c265c82.zip | |
target-arm: Prepare VFP_CONV_FIX helpers for A64 uses
Make the VFP_CONV_FIX helpers a little more flexible in
preparation for the A64 uses. This requires two changes:
* use the correct softfloat conversion function based on itype
rather than always the int32 one; this is possible now that
softfloat provides int16 versions and necessary for the
future conversion-to-int64 A64 variants. This also allows
us to drop the awkward 'sign' macro argument.
* split the 'fsz' argument which currently controls both
width of the input float type and width of the output
integer type into two; this will allow us to specify the
A64 64-bit-int-to-single conversion function, where the
two widths are different.
We can also drop the (itype##_t) cast now that softfloat
guarantees that all the itype##_to_float* functions take
an integer argument of exactly the correct type.
Signed-off-by: Will Newton <will.newton@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-arm')
| -rw-r--r-- | target-arm/helper.c | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c index 6f629f36b0..5579565d19 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -3976,17 +3976,17 @@ float32 VFP_HELPER(fcvts, d)(float64 x, CPUARMState *env) } /* VFP3 fixed point conversion. */ -#define VFP_CONV_FIX(name, p, fsz, itype, sign) \ -float##fsz HELPER(vfp_##name##to##p)(uint##fsz##_t x, uint32_t shift, \ - void *fpstp) \ +#define VFP_CONV_FIX(name, p, fsz, isz, itype) \ +float##fsz HELPER(vfp_##name##to##p)(uint##isz##_t x, uint32_t shift, \ + void *fpstp) \ { \ float_status *fpst = fpstp; \ float##fsz tmp; \ - tmp = sign##int32_to_##float##fsz((itype##_t)x, fpst); \ + tmp = itype##_to_##float##fsz(x, fpst); \ return float##fsz##_scalbn(tmp, -(int)shift, fpst); \ } \ -uint##fsz##_t HELPER(vfp_to##name##p)(float##fsz x, uint32_t shift, \ - void *fpstp) \ +uint##isz##_t HELPER(vfp_to##name##p)(float##fsz x, uint32_t shift, \ + void *fpstp) \ { \ float_status *fpst = fpstp; \ float##fsz tmp; \ @@ -3998,14 +3998,14 @@ uint##fsz##_t HELPER(vfp_to##name##p)(float##fsz x, uint32_t shift, \ return float##fsz##_to_##itype##_round_to_zero(tmp, fpst); \ } -VFP_CONV_FIX(sh, d, 64, int16, ) -VFP_CONV_FIX(sl, d, 64, int32, ) -VFP_CONV_FIX(uh, d, 64, uint16, u) -VFP_CONV_FIX(ul, d, 64, uint32, u) -VFP_CONV_FIX(sh, s, 32, int16, ) -VFP_CONV_FIX(sl, s, 32, int32, ) -VFP_CONV_FIX(uh, s, 32, uint16, u) -VFP_CONV_FIX(ul, s, 32, uint32, u) +VFP_CONV_FIX(sh, d, 64, 64, int16) +VFP_CONV_FIX(sl, d, 64, 64, int32) +VFP_CONV_FIX(uh, d, 64, 64, uint16) +VFP_CONV_FIX(ul, d, 64, 64, uint32) +VFP_CONV_FIX(sh, s, 32, 32, int16) +VFP_CONV_FIX(sl, s, 32, 32, int32) +VFP_CONV_FIX(uh, s, 32, 32, uint16) +VFP_CONV_FIX(ul, s, 32, 32, uint32) #undef VFP_CONV_FIX /* Half precision conversions. */ |