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authorbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2007-10-31 00:47:13 +0000
committerbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2007-10-31 00:47:13 +0000
commit405ee3ad573c35790500048d07d5c7ac93167e6a (patch)
treef101356976cbca20703a9a6017fdd5de31d377c8 /target-arm/helper.c
parent7bfe5777023bb88e8f63a3e80a836f3eb7b13fdc (diff)
downloadqemu-405ee3ad573c35790500048d07d5c7ac93167e6a.zip
Invalidate TLBs when domains are changed (Matthew Warton).
Legalise cp15 pid register writes (Matthew Warton). git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3494 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-arm/helper.c')
-rw-r--r--target-arm/helper.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 4f851ce220..d06ee69e7a 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -704,6 +704,7 @@ void helper_set_cp15(CPUState *env, uint32_t insn, uint32_t val)
break;
case 3: /* MMU Domain access control / MPU write buffer control. */
env->cp15.c3 = val;
+ tlb_flush(env, 1); /* Flush TLB as domain not tracked in TLB */
break;
case 4: /* Reserved. */
goto bad_reg;
@@ -814,8 +815,6 @@ void helper_set_cp15(CPUState *env, uint32_t insn, uint32_t val)
case 13: /* Process ID. */
switch (op2) {
case 0:
- if (!arm_feature(env, ARM_FEATURE_MPU))
- goto bad_reg;
/* Unlike real hardware the qemu TLB uses virtual addresses,
not modified virtual addresses, so this causes a TLB flush.
*/